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| TMS320C6655 Datasheet, PDF (151/232 Pages) Texas Instruments – Fixed and Floating-Point Digital Signal Processor | |||
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Table 7-33
TMS320C6655/57
Fixed and Floating-Point Digital Signal Processor
SPRS814âMarch 2012
TMS320C6655/57 System Event Mapping â C66x CorePac Primary Interrupts (Part 4 of 4)
Event Number
104
105
106
107
108
109
Interrupt Event
QM_INT_HIGH_(n+10) (7)
QM_INT_HIGH_(n+14) (7)
QM_INT_HIGH_(n+18) (7)
QM_INT_HIGH_(n+22) (7)
QM_INT_HIGH_(n+26) (7)
QM_INT_HIGH_(n+30) (7)
Description
QM Interrupt for Queue 714+n8
QM Interrupt for Queue 718+n8
QM Interrupt for Queue 722+n8
QM Interrupt for Queue 726+n8
QM Interrupt for Queue 730+n8
QM Interrupt for Queue 734+n8
110
MDMAERREVT
VbusM error event
111
Reserved
112
INTDST(n+18) (11)
SRIO Interrupt
113
PMC_ED
114
INTDST(n+22) (12)
Single bit error detected during DMA read
SRIO Interrupt
115
EDMA3_CC_AETEVT
EDMA3 CC AET Event
116
UMC_ED1
Corrected bit error detected
117
UMC_ED2
Uncorrected bit error detected
118
PDC_INT
Power down sleep interrupt
119
SYS_CMPA
SYS CPU memory protection fault event
120
PMC_CMPA
PMC CPU memory protection fault event
121
PMC_DMPA
PMC DMA memory protection fault event
122
DMC_CMPA
DMC CPU memory protection fault event
123
DMC_DMPA
DMC DMA memory protection fault event
124
UMC_CMPA
UMC CPU memory protection fault event
125
UMC_DMPA
UMC DMA memory protection fault event
126
EMC_CMPA
EMC CPU memory protection fault event
127
End of Table 7-33
EMC_BUSERR
EMC bus error interrupt
1 CorePac[n] will receive TETBHFULLINTn, TETBFULLINTn, TETBACQINTn, TETBOVFLINTn, and TETBUNFLINTn
2 CorePac[n] will receive MSMC_mpf_errorn.
3 CorePac[n] will receive SEMINTn and SEMERRn.
4 CorePac[n] will receive PCIEXpress_MSI_INTn.
5 CorePac[n] will receive INTDST(n+16)
6 CorePac[n] will receive INTDST(n+16)
7 n is core number.
8 CorePac[n] will receive TINTLn and TINTHn.
9 CorePac[n] will receive GPINTn.
10 n is core number.
11 CorePac[n] will receive INTDST(n+16)
12 CorePac[n] will receive INTDST(n+16)
Table 7-34 CIC0 Event Inputs (Secondary Interrupts for C66x CorePacs) (Part 1 of 6)
Input Event# on CIC
0
1
2
3
4
5
6
7
System Interrupt
GPINT16
GPINT17
GPINT18
GPINT19
GPINT20
GPINT21
GPINT22
GPINT23
Description
GPIO interrupt
GPIO interrupt
GPIO interrupt
GPIO interrupt
GPIO interrupt
GPIO interrupt
GPIO interrupt
GPIO interrupt
Copyright 2012 Texas Instruments Incorporated
TI ConfidentialâNDA Restrictions
Peripheral Information and Electrical Specifications 151
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