THS3115CPWP Datasheet, PDF (15/35 Pages) Texas Instruments – LOW-NOISE, HIGH-SPEED, CURRENT FEEDBACK AMPLIFIERS

THS3112
THS3115
www.ti.com
Power-Down Reference Pin Operation
In addition to the shutdown pin, the THS3115
features a reference pin (REF) which allows the user
to control the enable or disable power-down voltage
levels applied to the SHUTDOWN pin. In most
split-supply applications, the reference pin is
connected to ground. In either case, the user needs
to be aware of voltage-level thresholds that apply to
the shutdown pin. Table 2 shows examples and
illustrate the relationship between the reference
voltage and the shutdown thresholds. In the table, the
threshold levels are derived by the following
equations:
SHUTDOWN ≤ REF + 0.8 V for enable
SHUTDOWN ≥ REF + 2V for disable
Where the usable range at the REF pin is:
V_CC– ≤ V_REF ≤ (V_CC+ – 4V)
The recommended mode of operation is to tie the
REF pin to midrail, therefore setting the
enable/disable thresholds to V_(midrail) + 0.8 V and
V_(midrail) = 2 V, respectively.
Table 2. Shutdown Threshold Voltage Levels
REFERENCE
SUPPLY
PIN
VOLTAGE (V) VOLTAGE (V)
±15, ±5
0
±15
2.0
±15
–2.0
±5
1.0
±5
–1.0
+30
15.0
+10
5.0
ENABLE
LEVEL (V)
0.8
2.8
–1.2
1.8
–0.2
15.8
5.8
DISABLE
LEVEL (V)
2.0
4.0
0
3.0
1.0
17
7.0
Note that if the REF pin is left unterminated, it floats
to the positive rail and falls outside of the
recommended operating range given above V_CC– ≤
V_REF ≤ (V_CC+ – 4V). As a result, it no longer serves as
a reliable reference for the SHUTDOWN pin, and the
enable/disable thresholds given above no longer
apply. If the SHUTDOWN pin is also left
unterminated, it floats to the positive rail and the
device is disabled. If balanced, split supplies are used
(±V_CC) and the REF and SHUTDOWN pins are
grounded, the device is enabled.
space
space
space
SLOS385C – SEPTEMBER 2001 – REVISED SEPTEMBER 2010
Printed-Circuit Board Layout Techniques for
Optimal Performance
Achieving optimum performance with high-frequency
amplifiers such as the THS3115 and THS3112
requires careful attention to board layout parasitic and
external component types. Recommendations that
optimize performance include:
• Minimize parasitic capacitance to any ac ground
for all of the signal I/O pins. Parasitic capacitance
on the output and input pins can cause instability.
To reduce unwanted capacitance, a window
around the signal I/O pins should be opened in all
of the ground and power planes around those
pins. Otherwise, ground and power planes should
be unbroken elsewhere on the board.
• Minimize the distance [0.25 inch, (6,4 mm)] from
the power-supply pins to high-frequency 0.1-µF
and 100-pF decoupling capacitors. At the device
pins, the ground and power plane layout should
not be in close proximity to the signal I/O pins.
Avoid narrow power and ground traces to
minimize inductance between the pins and the
decoupling capacitors. The power-supply
connections should always be decoupled with
these capacitors. Larger (6.8 µF or more)
tantalum decoupling capacitors, effective at lower
frequencies, should also be used on the main
supply pins. These capacitors may be placed
somewhat farther from the device and may be
shared among several devices in the same area
of the printed circuit board (PCB).
• Careful selection and placement of external
components preserve the high-frequency
performance of the THS3115 and THS3112.
Resistors should be a very low reactance type.
Surface-mount resistors work best and allow a
tighter overall layout. Again, keep the leads and
PCB trace length as short as possible. Never use
wirebound type resistors in a high-frequency
application. Because the output pin and inverting
input pins are the most sensitive to parasitic
capacitance, always position the feedback and
series output resistors, if any, as close as possible
to the inverting input pins and output pins. Other
network components, such as input termination
resistors, should be placed close to the
gain-setting resistors. Even with a low parasitic
capacitance that shunts the external resistors,
excessively high resistor values can create
significant time constants that can degrade
performance. Good axial metal-film or
surface-mount resistors have approximately 0.2
pF in shunt with the resistor. For resistor values
greater than 2.0 kΩ, this parasitic capacitance can
add a pole and/or a zero that can affect circuit
operation. Keep resistor values as low as
possible, consistent with load driving
considerations.
Copyright © 2001–2010, Texas Instruments Incorporated
Product Folder Link(s): THS3112 THS3115
Submit Documentation Feedback
15