OPA3692IDBQT Datasheet, PDF (15/26 Pages) Texas Instruments – Triple, Wideband, Fixed Gain Video BUFFER AMPLIFIER With Disable

harmonic increases by less than the expected 12dB. This also
shows up in the 2-tone, 3rd-order intermodulation spurious (IM3)
response curves. The 3rd-order spurious levels are extremely
low at low output power levels. The output stage continues to
hold them low even as the fundamental power reaches very high
levels. As the Typical Characteristics show, the spurious
intermodulation powers do not increase as predicted by a
traditional intercept model. As the fundamental power level
increases, the dynamic range does not decrease significantly.
For two tones centered at 20MHz, with 10dBm/tone into a
matched 50Ω load (that is, 2Vp-p for each tone at the load, which
requires 8Vp-p for the overall 2-tone envelope at the output pin),
the Typical Characteristics show a 58dBc difference between the
test-tone power and the 3rd-order intermodulation spurious
levels. This exceptional performance improves further when
operating at lower frequencies.
NOISE PERFORMANCE
The OPA3692 offers an excellent balance between voltage
and current noise terms to achieve low output noise. The
inverting current noise (15pA/√Hz) is significantly lower than
earlier solutions while the input voltage noise (1.7nV/√Hz) is
lower than most unity-gain stable, wideband, voltage-feedback
op amps. This low input voltage noise was achieved at the
price of higher noninverting input current noise (12pA/√Hz). As
long as the AC source impedance looking out of the
noninverting node is less than 100Ω, this current noise will not
contribute significantly to the total output noise. The op amp
input voltage noise and the two input current noise terms
combine to give low output noise under a wide variety of
operating conditions. Figure 7 shows the op amp noise analy-
sis model with all the noise terms included. In this model, all
noise terms are taken to be noise voltage or current density
terms in either nV/√Hz or pA/√Hz.
E_NI
R_S
I_BN
OPA3692
E_O
E_RS
√4kTR_S
4kT
R_G
R_G
I_BI
R_F
√4kTR_F
4kT = 1.6E –20J
at 290°K
FIGURE 7. Noise Model.
The total output spot noise voltage can be computed as the
square root of the sum of all squared output noise voltage
contributors. Equation 1 shows the general form for the output
noise voltage using the terms shown in Figure 7.
(1)
( ) ( ) E_O =


E_NI2
+
I_BNR_S
2
+
4kTR_S


NG²
+
I_BIR_F
2
+ 4kTR_FNG
Dividing this expression by the noise gain (NG = (1+R_F/R_G))
gives the equivalent input-referred spot noise voltage at the
noninverting input as shown in Equation 2.
(2)
( ) E_N =
E_NI2
+
I_BNR_S
2
+ 4kTR_S
+

I_BIR_F
NG

2
+
4kTR_F
NG
Evaluating these two equations for the OPA3692 circuit and
component values shown in Figure 1 gives a total output spot
noise voltage of 8nV/√Hz and a total equivalent input spot
noise voltage of 4nV/√Hz. This total input-referred spot noise
voltage is higher than the 1.7nV/√Hz specification for the op
amp voltage noise alone. This reflects the noise added to the
output by the inverting current noise times the feedback
resistor. This inverting node current noise is modeled as
internal to the OPA3692 with R_F set internally as well.
DC ACCURACY
The OPA3692 provides exceptional bandwidth in high gains,
giving fast pulse settling but only moderate DC accuracy. The
Electrical Characteristics show an input offset voltage com-
parable to high-speed voltage-feedback amplifiers. However,
the two input bias currents are somewhat higher and are
unmatched. Bias current cancellation techniques do not
reduce the output DC offset for OPA3692. As the two input
bias currents are unrelated in both magnitude and polarity,
matching the source impedance looking out of each input to
reduce their error contribution to the output is ineffective.
Evaluating the configuration of Figure 1, using worst-case
+25°C input offset voltage and the two input bias currents,
gives a worst-case output offset range equal to:
±(NG • V_OS(MAX)) + (I_BN • R_S/2 • NG) ± (I_BI • R_F)
where NG = noninverting signal gain
= ±(2 • 3mV) + (35µA • 25Ω • 2) ± (402Ω • 25µA)
= ±6mV + 1.75mV ± 10.05mV
= –14.3mV → +17.8mV
Minimizing the resistance seen by the noninverting input will
give the best DC offset performance.
OPA3692
15
SBOS228E
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