LMC6492 Datasheet, PDF (15/28 Pages) National Semiconductor (TI) – CMOS Rail-to-Rail Input and Output Operational Amplifier

LMC6492, LMC6494
www.ti.com
SNOS724D – AUGUST 2000 – REVISED MARCH 2013
Applications that exceed this rating must externally limit the maximum input current to ±5 mA with an input
resistor (R_I) as shown in Figure 57.
Figure 57. R_I Input Current Protection for
Voltages Exceeding the Supply Voltages
RAIL-TO-RAIL OUTPUT
The approximate output resistance of the LMC6492/4 is 110Ω sourcing and 80Ω sinking at V_s = 5V. Using the
calculated output resistance, maximum output voltage swing can be esitmated as a function of load.
COMPENSATING FOR INPUT CAPACITANCE
It is quite common to use large values of feedback resistance for amplifiers with ultra-low input current, like the
LMC6492/4.
Although the LMC6492/4 is highly stable over a wide range of operating conditions, certain precautions must be
met to achieve the desired pulse response when a large feedback resistor is used. Large feedback resistors with
even small values of input capacitance, due to transducers, photodiodes, and circuit board parasitics, reduce
phase margins.
When high input impedances are demanded, guarding of the LMC6492/4 is suggested. Guarding input lines will
not only reduce leakage, but lowers stray input capacitance as well. (See Printed-Circuit-Board Layout for High
Impedance Work).
The effect of input capacitance can be compensated for by adding a capacitor, C_f, around the feedback resistors
(as in Figure 55 ) such that:
(1)
or
R₁ C_IN ≤ R₂ C_f
(2)
Since it is often difficult to know the exact value of C_IN, C_f can be experimentally adjusted so that the desired
pulse response is achieved. Refer to the LMC660 and LMC662 for a more detailed discussion on compensating
for input capacitance.
Figure 58. Cancelling the Effect of Input Capacitance
CAPACITIVE LOAD TOLERANCE
All rail-to-rail output swing operational amplifiers have voltage gain in the output stage. A compensation capacitor
is normally included in this integrator stage. The frequency location of the dominant pole is affected by the
resistive load on the amplifier. Capacitive load driving capability can be optimized by using an appropriate
resistive load in parallel with the capacitive load (see Typical Curves).
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