TMS320C6713B_17 Datasheet, PDF (144/154 Pages) Texas Instruments – FLOATING-POINT DIGITAL SIGNAL PROCESSOR

TMS320C6713B
FLOATINGĆPOINT DIGITAL SIGNAL PROCESSOR
SPRS294B − OCTOBER 2005 − REVISED JUNE 2006
JTAG TEST-PORT TIMING
timing requirements for JTAG test port (see Figure 67)
NO.
1 tc(TCK)
Cycle time, TCK
3 tsu(TDIV-TCKH) Setup time, TDI/TMS/TRST valid before TCK high
4 th(TCKH-TDIV) Hold time, TDI/TMS/TRST valid after TCK high
PYP-200,-225
GDP/ZDP -225, -300
PYPA
-167, -200
GDPA/ZDPA −200
MIN MAX
35
10
7
UNIT
ns
ns
ns
switching characteristics over recommended operating conditions for JTAG test port
(see Figure 67)
NO.
PARAMETER
2 td(TCKL-TDOV) Delay time, TCK low to TDO valid
PYP-200,-225
GDP/ZDP -225, -300
PYPA
-167, -200
GDPA/ZDPA −200
MIN MAX
0
15
UNIT
ns
TCK
TDO
TDI/TMS/TRST
1
2
2
4
3
Figure 67. JTAG Test-Port Timing
144
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