TM4C123AE6PM Datasheet, PDF (14/1237 Pages) Texas Instruments – Tiva TM4C123AE6PM Microcontroller

Table of Contents
List of Tables
Table 1.
Table 2.
Table 1-1.
Table 2-1.
Table 2-2.
Table 2-3.
Table 2-4.
Table 2-5.
Table 2-6.
Table 2-7.
Table 2-8.
Table 2-9.
Table 2-10.
Table 2-11.
Table 2-12.
Table 2-13.
Table 3-1.
Table 3-2.
Table 3-3.
Table 3-4.
Table 3-5.
Table 3-6.
Table 3-7.
Table 3-8.
Table 3-9.
Table 3-10.
Table 4-1.
Table 4-2.
Table 4-3.
Table 5-1.
Table 5-2.
Table 5-3.
Table 5-4.
Table 5-5.
Table 5-6.
Table 5-7.
Table 5-8.
Table 6-1.
Table 7-1.
Table 7-2.
Table 7-3.
Table 8-1.
Table 8-2.
Table 8-3.
Table 8-4.
Table 8-5.
Revision History .................................................................................................. 34
Documentation Conventions ................................................................................ 38
TM4C123AE6PM Microcontroller Features ............................................................ 41
Summary of Processor Mode, Privilege Level, and Stack Use ................................ 66
Processor Register Map ....................................................................................... 67
PSR Register Combinations ................................................................................. 73
Memory Map ....................................................................................................... 84
Memory Access Behavior ..................................................................................... 87
SRAM Memory Bit-Banding Regions .................................................................... 89
Peripheral Memory Bit-Banding Regions ............................................................... 90
Exception Types .................................................................................................. 95
Interrupts ............................................................................................................ 96
Exception Return Behavior ................................................................................. 103
Faults ............................................................................................................... 104
Fault Status and Fault Address Registers ............................................................ 105
Cortex-M4F Instruction Summary ....................................................................... 107
Core Peripheral Register Regions ....................................................................... 114
Memory Attributes Summary .............................................................................. 118
TEX, S, C, and B Bit Field Encoding ................................................................... 120
Cache Policy for Memory Attribute Encoding ....................................................... 121
AP Bit Field Encoding ........................................................................................ 121
Memory Region Attributes for Tiva™ C Series Microcontrollers ............................. 122
QNaN and SNaN Handling ................................................................................. 125
Peripherals Register Map ................................................................................... 126
Interrupt Priority Levels ...................................................................................... 156
Example SIZE Field Values ................................................................................ 184
JTAG_SWD_SWO Signals (64LQFP) ................................................................. 193
JTAG Port Pins State after Power-On Reset or RST assertion .............................. 194
JTAG Instruction Register Commands ................................................................. 200
System Control & Clocks Signals (64LQFP) ........................................................ 204
Reset Sources ................................................................................................... 205
Clock Source Options ........................................................................................ 212
Possible System Clock Frequencies Using the SYSDIV Field ............................... 214
Examples of Possible System Clock Frequencies Using the SYSDIV2 Field .......... 215
Examples of Possible System Clock Frequencies with DIV400=1 ......................... 215
System Control Register Map ............................................................................. 222
RCC2 Fields that Override RCC Fields ............................................................... 249
System Exception Register Map ......................................................................... 462
Flash Memory Protection Policy Combinations .................................................... 475
User-Programmable Flash Memory Resident Registers ....................................... 479
Flash Register Map ............................................................................................ 486
μDMA Channel Assignments .............................................................................. 532
Request Type Support ....................................................................................... 534
Control Structure Memory Map ........................................................................... 535
Channel Control Structure .................................................................................. 535
μDMA Read Example: 8-Bit Peripheral ................................................................ 544
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June 12, 2014
Texas Instruments-Production Data