TLC59108F_15 Datasheet, PDF (14/37 Pages) Texas Instruments – 8-Bit FM+ I2C Bus LED Driver

TLC59108F
SLDS162B – MARCH 2009 – REVISED DECEMBER 2015
www.ti.com
Programming (continued)
8.5.8 Acknowledge
The number of data bytes transferred between the Start and the Stop conditions from transmitter to receiver is
not limited. Each byte of eight bits is followed by one acknowledge bit. The acknowledge bit is a high level put on
the bus by the transmitter, whereas the master generates an extra acknowledge related clock pulse.
A slave receiver which is addressed must generate an acknowledge after the reception of each byte. Also a
master must generate an acknowledge after the reception of each byte that has been clocked out of the slave
transmitter. The device that acknowledges has to pull down the SDA line during the acknowledge clock pulse, so
that the SDA line is stable low during the high period of the acknowledge related clock pulse; set-up time and
hold time must be taken into account.
A master receiver must signal an end of data to the transmitter by not generating an acknowledge on the last
byte that has been clocked out of the slave. In this event, the transmitter must leave the data line high to enable
the master to generate a Stop condition.
Data Output
by Transmitter
Data Output
by Receiver
NACK
ACK
SCL From
Master
S
Start
Condition
1
2
8
Figure 13. Acknowledge on I²C Bus
Slave Address
Control Register
S
1
0
0 A3 A2 A1 A0 0
A
X
X
X D4 D3 D2 D1 D0 A
START Condition
Auto-Increment Options
R/W
Auto-Increment Flag
Acknowledge
From Slave
Acknowledge
From Slave
Figure 14. Write to a Specific Register
9
Clock Pulse for
Acknowledgment
A
P
STOP
Condition
Acknowledge
From Slave
14
Submit Documentation Feedback
Product Folder Links: TLC59108F
Copyright © 2009–2015, Texas Instruments Incorporated