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DRV5023_16 Datasheet, PDF (14/28 Pages) Texas Instruments – Digital-Switch Hall Effect Sensor
DRV5023
SLIS151E – MAY 2014 – REVISED FEBRUARY 2016
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Feature Description (continued)
7.3.4 Output Stage
The DRV5023 output stage uses an open-drain NMOS, and it is rated to sink up to 30 mA of current. For proper
operation, calculate the value of the pullup resistor R1 using Equation 1.
Vref max d R1 d Vref min
30 mA
100 µA
(1)
The size of R1 is a tradeoff between the OUT rise time and the current when OUT is pulled low. A lower current
is generally better, however faster transitions and bandwidth require a smaller resistor for faster switching.
In addition, ensure that the value of R1 > 500 Ω to ensure the output driver can pull the OUT pin close to GND.
NOTE
Vref is not restricted to VCC. The allowable voltage range of this pin is specified in the
Absolute Maximum Ratings.
Vref
OCP
Gate
Drive
R1
OUT
ISINK
C2
GND
Figure 17.
Select a value for C2 based on the system bandwidth specifications as shown in Equation 2.
u ¦BW +]
1
2S u R1 u C2
(2)
Most applications do no require this C2 filtering capacitor.
14
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