English
Language : 

MSP430F22X2_17 Datasheet, PDF (13/94 Pages) Texas Instruments – MIXED SIGNAL MICROCONTROLLER
MSP430F22x2
MSP430F22x4
www.ti.com
SLAS504G – JULY 2006 – REVISED AUGUST 2012
Table 4. Terminal Functions, MSP430F22x4 (continued)
TERMINAL
NAME
NO.
I/O
YFF DA RHA
DESCRIPTION
General-purpose digital I/O pin
P4.3/TB0/A12/OA0O
Timer_B, capture: CCI0B input, compare: OUT0 output
E7
20
18
I/O
ADC10 analog input A12
OA0 analog output
General-purpose digital I/O pin
P4.4/TB1/A13/OA1O
Timer_B, capture: CCI1B input, compare: OUT1 output
F7
21
19
I/O
ADC10 analog input A13
OA1 analog output
General-purpose digital I/O pin
P4.5/TB2/A14/OA0I3
Timer_B, compare: OUT2 output
F6
22
20
I/O
ADC10 analog input A14
OA0 analog input I3
General-purpose digital I/O pin
Timer_B, switch all TB0 to TB3 outputs to high impedance
P4.6/TBOUTH/A15/OA1I3 G7
23
21
I/O
ADC10 analog input A15
OA1 analog input I3
P4.7/TBCLK
General-purpose digital I/O pin
F5
24
22
I/O
Timer_B, clock signal TBCLK input
RST/NMI/SBWTDIO
Reset or nonmaskable interrupt input
B3
7
5
I
Spy-Bi-Wire test data input/output during programming and test
TEST/SBWTCK
Selects test mode for JTAG pins on Port 1. The device protection fuse is
D1
1
37
I connected to TEST.
Spy-Bi-Wire test clock input during programming and test
DVCC
C1,
D3,
D4,
2 38, 39
E4, E5
Digital supply voltage
AVCC
C6,
C7, 16
14
D5
Analog supply voltage
DVSS
A3,
B1,
B2,
4
1, 4
C3,
C4
Digital ground reference
AVSS
B7,
C5
15
13
Analog ground reference
QFN Pad
NA NA Pad NA QFN package pad; connection to DVSS recommended.
Copyright © 2006–2012, Texas Instruments Incorporated
13