LMH6703_16 Datasheet, PDF (13/26 Pages) Texas Instruments – 1.2 GHz, Low Distortion Op Amp with Shutdown

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LMH6703
SNOSAF2E – FEBRUARY 2005 – REVISED MAY 2016
Device Functional Modes (continued)
The LMH6703 was optimized for high speed operation. As shown in Figure 27, the suggested value for R_F
decreases for higher gains. Due to the output impedance of the input buffer, there is a practical limit for how
small R_F can go, based on the lowest practical value of R_G. This limitation applies to both inverting and non
inverting configurations. For the LMH6703 the input resistance of the inverting input is approximately 30Ω and
20Ω is a practical (but not hard and fast) lower limit for R_G. The LMH6703 begins to operate in a gain bandwidth
limited fashion in the region when R_G is nearly equal to the input buffer impedance. Note that the amplifier will
operate with R_G values well below 20 Ω, however results may be substantially different than predicted from ideal
models. In particular the voltage potential between the Inverting and Non-Inverting inputs cannot be expected to
remain small.
Inverting gain applications that require impedance matched inputs may limit gain flexibility somewhat (especially
if maximum bandwidth is required). The impedance seen by the source is R_G || R_T (R_T is optional). The value of
R_G is R_F /Gain. Thus for a SOT-23 in a gain of —5V/V, an R_F of 460 Ω is optimum and R_G is 92 Ω. Without a
termination resistor, R_T, the input impedance would equal R_G, 92 Ω. Using an R_T of 109Ω will set the input
resistance to match a 50-Ω source. Note that source impedances greater then R_G cannot be matched in the
inverting configuration.
For more information see Application Note OA-13 (SNOA366) which describes the relationship between R_F and
closed-loop frequency response for current feedback operational amplifiers. The value for the inverting input
impedance for the LMH6703 is approximately 30 Ω. The LMH6703 is designed for optimum performance at gains
of 1 to 10 V/V and −1 to −9 V/V. Higher gain configurations are still useful, however, the bandwidth will fall as
gain is increased, much like a typical voltage feedback amplifier.
The LMH6703 data sheet shows both SOT-23-6 and SOIC data in the Electrical Characteristic section to aid in
selecting the right package. The Typical Characteristics section shows SOT-23-6 package plots only.
8.3.2 DC Accuracy and Noise
Example below shows the output offset computation equation for the non-inverting configuration (see Figure 29)
using the typical bias current and offset specifications for A_V = 2:
Output Offset : V_O = (I_BN × R_IN ± V_OS) (1 + R_F/R_G) ± I_BI × R_F
Where R_IN is the equivalent input impedance on the non-inverting input.
Example computation for A_V = 2, R_F = 560 Ω, R_IN = 25 Ω:
V_O = (7 μA × 25 Ω ± 1.5 mV) (1 + 560/560) ± 2 μA × 560≈ −3.7 mV to 4.5 mV
A good design, however, should include a worst case calculation using Min/Max numbers in the data sheet
tables, in order to ensure "worst case" operation.
Further improvement in the output offset voltage and drift is possible using the composite amplifiers described in
Application Note OA-07 (SNOA365). The two input bias currents are physically unrelated in both magnitude and
polarity for the current feedback topology. It is not possible, therefore, to cancel their effects by matching the
source impedance for the two inputs (as is commonly done for matched input bias current devices).
The total output noise is computed in a similar fashion to the output offset voltage. Using the input noise voltage
and the two input noise currents, the output noise is developed through the same gain equations for each term
but combined as the square root of the sum of squared contributing elements. See Application Note OA-12
(SNOA375) for a full discussion of noise calculations for current feedback amplifiers.
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