TM4C1290NCPDT Datasheet, PDF (1294/1628 Pages) Texas Instruments – Tiva Microcontroller

Inter-Integrated Circuit (I²C) Interface
Bit/Field
9
8
7
6
5
4
Name
RXIM
TXIM
ARBLOSTIM
STOPIM
STARTIM
NACKIM
Type
RW
Reset
0
Description
Receive FIFO Request Interrupt Mask
Value Description
0 The RXRIS interrupt is suppressed and not sent to the interrupt
controller.
1 The RX FIFO Request interrupt is sent to the interrupt controller
when the RXRIS bit in the I2CMRIS register is set.
RW
0
Transmit FIFO Request Interrupt Mask
Value Description
0 The TXRIS interrupt is suppressed and not sent to the interrupt
controller.
1 The TX FIFO Request interrupt is sent to the interrupt controller
when the TXRIS bit in the I2CMRIS register is set.
RW
0
Arbitration Lost Interrupt Mask
Value Description
0 The ARBLOSTRIS interrupt is suppressed and not sent to the
interrupt controller.
1 The Arbitration Lost interrupt is sent to the interrupt controller
when the ARBLOSTRIS bit in the I2CMRIS register is set.
RW
0
STOP Detection Interrupt Mask
Value Description
0 The STOPRIS interrupt is suppressed and not sent to the
interrupt controller.
1 The STOP detection interrupt is sent to the interrupt controller
when the STOPRIS bit in the I2CMRIS register is set.
RW
0
START Detection Interrupt Mask
Value Description
0 The STARTRIS interrupt is suppressed and not sent to the
interrupt controller.
1 The START detection interrupt is sent to the interrupt controller
when the STARTRIS bit in the I2CMRIS register is set.
RW
0
Address/Data NACK Interrupt Mask
Value Description
0 The NACKRIS interrupt is suppressed and not sent to the
interrupt controller.
1 The address/data NACK interrupt is sent to the interrupt
controller when the NACKRIS bit in the I2CMRIS register is set.
1294
Texas Instruments-Production Data
June 18, 2014