TMS320F2810_12 Datasheet, PDF (129/172 Pages) Texas Instruments – Digital Signal Processors

TMS320F2810, TMS320F2811, TMS320F2812
TMS320C2810, TMS320C2811, TMS320C2812
www.ti.com
SPRS174T – APRIL 2001 – REVISED MAY 2012
Unless otherwise specified, all XINTF timing is applicable for the clock configurations shown in Table 6-31.
Table 6-31. XINTF Clock Configurations
MODE
1
Example:
2
Example:
3
Example:
4
Example:
SYSCLKOUT
150 MHz
150 MHz
150 MHz
150 MHz
XTIMCLK
SYSCLKOUT
150 MHz
SYSCLKOUT
150 MHz
1/2 SYSCLKOUT
75 MHz
1/2 SYSCLKOUT
75 MHz
XCLKOUT
SYSCLKOUT
150 MHz
1/2 SYSCLKOUT
75 MHz
1/2 SYSCLKOUT
75 MHz
1/4 SYSCLKOUT
37.5 MHz
The relationship between SYSCLKOUT and XTIMCLK is shown in Figure 6-30.
XTIMING0
XTIMING1
XTIMING2
XTIMING6
XTIMING7
XBANK
LEAD/ACTIVE/TRAIL
C28x
SYSCLKOUT
CPU
/2
(A)
1
XTIMCLK
0
/2
(A)
1
0
0
1
0
XCLKOUT
XINTCNF2
(XTIMCLK)
XINTCNF2
(CLKMODE)
XINTCNF2
(CLKOFF)
(A)
Default value after reset
Figure 6-30. Relationship Between XTIMCLK and SYSCLKOUT
Copyright © 2001–2012, Texas Instruments Incorporated
Electrical Specifications 129
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