TIBPAL22VP10-20C_15 Datasheet, PDF (12/24 Pages) Texas Instruments – HIGH-PERFORMANCE IMPACT-X

Obsolete Device
TIBPAL22VP10-20C, TIBPAL22VP10-25M
HIGH-PERFORMANCE IMPACT-X ™ PROGRAMMABLE ARRAY LOGIC CIRCUITS
SRPS013 − D2943, FEBRUARY 1987 − REVISED JUNE 1991
power-up reset
Following power up, all registers are reset to zero. The output level depends on the polarity selected during
programming. This feature provides extra flexibility to the system designer and is especially valuable in
simplifying state-machine initialization. To ensure a valid power-up reset, it is important that the rise of V_CC be
monotonic. Following power-up reset, a low-to-high clock transition must not occur until all applicable input and
feedback setup times are met.
V_CC
4V
5V
Active High
Registered Output
Active Low
Registered Output
CLK
t_pd ^†
(600 ns typ, 1000 ns MAX)
State Unknown
1.5 V
State Unknown
1.5 V
t_su ^‡
1.5 V
t_w
V_OH
V_OL
V_OH
V_OL
V_IH
1.5 V
V_IL
† _{This is the power-up reset time and applies to registered outputs only. The values shown are from characterization data.}
‡ _{This is the setup time for input or feedback.}
Figure 3. Power-Up Reset Waveforms
programming information
Texas Instruments programmable logic devices can be programmed using widely available software and
inexpensive device programmers.
When the additional fuses are not being used, the TIBPAL22VP10 can be programmed using the
TIBPAL22V10/10A programming algorithm. The fuse configuration data can either be from a JEDEC file (format
per JEDEC Standard No. 3-A) or a TIBPAL22V10/10A master.
Complete programming specifications, algorithms, and the latest information on hardware, software, and
firmware are available upon request. Information on programmers capable of programming Texas Instruments
programmable logic is also available, upon request, from the nearest TI field sales office, local authorized TI
distributor, or by calling Texas Instruments at [phone].
12
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265