OPA322 Datasheet, PDF (12/36 Pages) Texas Instruments – 20-MHz, Low-Noise, 1.8-V, RRI/O, CMOS Operational Amplifier with Shutdown

OPA322, OPA322S
OPA2322, OPA2322S
OPA4322, OPA4322S
SBOS538E – JANUARY 2011 – REVISED JUNE 2012
APPLICATION INFORMATION
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OPERATING VOLTAGE
The OPA322 series op amps are unity-gain stable and can operate on a single-supply voltage (1.8 V to 5.5 V), or
a split-supply voltage (±0.9 V to ±2.75 V), making them highly versatile and easy to use. The power-supply pins
should have local bypass ceramic capacitors (typically 0.001 μF to 0.1 μF). These amplifiers are fully specified
from +1.8 V to +5.5 V and over the extended temperature range of –40°C to +125°C. Parameters that can exhibit
variance with regard to operating voltage or temperature are presented in the Typical Characteristics.
INPUT AND ESD PROTECTION
The OPA322 incorporates internal electrostatic discharge (ESD) protection circuits on all pins. In the case of
input and output pins, this protection primarily consists of current-steering diodes connected between the input
and power-supply pins. These ESD protection diodes also provide in-circuit input overdrive protection, as long as
the current is limited to 10 mA as stated in the Absolute Maximum Ratings table. Many input signals are
inherently current-limited to less than 10 mA; therefore, a limiting resistor is not required. Figure 30 shows how a
series input resistor (R_S) may be added to the driven input to limit the input current. The added resistor
contributes thermal noise at the amplifier input and the value should be kept to the minimum in noise-sensitive
applications.
I_OVERLOAD
10 mA, Max
V_IN
R_S
V+
OPA322
V_OUT
Figure 30. Input Current Protection
PHASE REVERSAL
The OPA322 op amps are designed to be immune to phase reversal when the input pins exceed the supply
voltages, therefore providing further in-system stability and predictability. Figure 31 shows the input voltage
exceeding the supply voltage without any phase reversal.
4
V_S = ±2.5 V
3
2
1
V_IN
V_OUT
0
-1
-2
-3
-4
-500
-250
0
250
500
Time (ms)
750 1000
Figure 31. No Phase Reversal
12
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