LM3475_14 Datasheet, PDF (12/21 Pages) Texas Instruments – Hysteretic PFET Buck Controller

LM3475
SNVS239A – OCTOBER 2004 – REVISED JANUARY 2005
www.ti.com
DIODE SELECTION
The catch diode provides the current path to the load during the PFET off time. Therefore, the current rating of
the diode must be higher than the average current through the diode, which be calculated as shown:
I_{D_AVE} = I_OUT x (1 − D)
(11)
The peak voltage across the catch diode is approximately equal to the input voltage. Therefore, the diode’s peak
reverse voltage rating should be greater than 1.3 times the input voltage.
A Schottky diode is recommended, since a low forward voltage drop will improve efficiency.
For high temperature applications, diode leakage current may become significant and require a higher reverse
voltage rating to achieve acceptable performance.
P-CHANNEL MOSFET SELECTION
The PFET switch should be selected based on the maximum Drain-Source voltage (VDS), Drain current rating
(I_D), maximum Gate-Source voltage (VGS), on resistance (R_DSON), and Gate capacitance. The voltage across the
PFET when it is turned off is equal to the sum of the input voltage and the diode forward voltage. The VDS must
be selected to provide some margin beyond the sum of the input voltage and Vd.
Since the current flowing through the PFET is equal to the current through the inductor, I_D must be rated higher
than the maximum I_PK. During switching, PGATE swings the PFET’s gate from V_IN to ground. Therefore, A PFET
must be selected with a maximum VGS larger than V_IN. To insure that the PFET turns on completely and quickly,
refer to the PGATE section.
The power loss in the PFET consists of switching losses and conducting losses. Although switching losses are
difficult to precisely calculate, the equation below can be used to estimate total power dissipation. Increasing
R_DSON will increase power losses and degrade efficiency. Note that switching losses will also increase with lower
gate threshold voltages.
PD_switch = R_DSONx (I_OUT)²x D + F x I_OUTx V_INx (t_on + t_off)/2
where
• t_on = FET turn on time
• t_off = FET turn off time
• A value of 10ns to 50ns is typical for ton and toff
(12)
Note that the R_DSON has a positive temperature coefficient. At 100°C, the R_DSON may be as much as 150% higher
than the value at 25°C.
The Gate capacitance of the PFET has a direct impact on both PFET transition time and the power dissipation in
the LM3475. Most of the power dissipated in the LM3475 is used to drive the PFET switch. This power can be
calculated as follows:
The amount of average gate driver current required during switching (I_G) is:
I_G = Q_g x F
(13)
And the total power dissipated in the device is:
I_qV_IN + I_GV_IN
where
• I_q is typically 260µA as shown in Electrical Characteristics
(14)
As gate capacitance increases, operating frequency may need to be reduced, or additional heat sinking may be
required to lower the power dissipation in the device.
In general, keeping the gate capacitance below 2000pF is recommended to keep transition times (switching
losses), and power losses low.
REDUCING SWITCHING NOISE
Although the LM3475 employs internal noise suppression circuitry, external noise may continue to be excessive.
There are several methods available to reduce noise and EMI.
12
Submit Documentation Feedback
Product Folder Links: LM3475
Copyright © 2004–2005, Texas Instruments Incorporated