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DRV3204-Q1 Datasheet, PDF (12/38 Pages) Texas Instruments – DRV3204-Q1 Three-Phase Brushless Motor Driver
Not Recommended for New Designs
DRV3204-Q1
SLVSBT3C – MARCH 2013 – REVISED JULY 2016
Motor Current OVADth
OVAD
MTOC SPI Register Flag
tfiltMTOC
tfiltMTOC
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SPI Access
FAULT
read
write 1
to clear
Pre-Driver
Enable
Disable
Enable
(1) MCU must set the FLTCFG.FLGLATCH_EN bit to 1 to get the latch-type operation shown in this figure.
(2) When MTOC condition is detected, FAULT is asserted to low if FE_MTOC bit is 1.
(3) When MTOC condition is detected, Pre Driver is disabled if SE_MTOC is 1.
Figure 6. Motor Overcurrent Event
VB
Enable
VIH
VIL
VCC
VDD
Band Gap
Charge Pump
Sleep
Device Active
Sleep
Figure 7. I/O ENABLE Timing Chart
12
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