LMC6484 Datasheet, PDF (11/45 Pages) National Semiconductor (TI) – CMOS Quad Rail-to-Rail Input and Output Operational Amplifier

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LMC6484
SNOS675C – AUGUST 2000 – REVISED SEPTEMBER 2015
6.8 DC Electrical Characteristics for LMC6484AI
Unless otherwise specified, all limits specified for T_J = 25°C, V⁺ = 3 V, V^− = 0 V, V_CM = V_O = V⁺/2 and R_L > 1 M.
PARAMETER
TEST CONDITIONS
MIN ⁽¹⁾
TYP ⁽²⁾
MAX ⁽¹⁾
V_OS
Input offset voltage
At the temperature extremes
0.9
2
2.7
TCV_OS
I_B
I_OS
CMRR
PSRR
Input offset voltage average drift
Input bias current
Input offset current
Common-mode rejection ratio
Power supply rejection ratio
0 V ≤ V_CM ≤ 3 V
3 V ≤ V⁺ ≤ 15 V, V^− = 0 V
V_CM
Input common-mode voltage range For CMRR ≥ 50 dB
2
0.02
0.01
64
74
68
80
V^− − 0.25
0
V⁺ V⁺ + 0.25
V_O
Output swing
R_L = 2 kΩ to V⁺/2
R_L = 600 Ω to V⁺/2
2.8
0.2
2.5
2.7
0.37
0.6
I_S
Supply current
All four
amplifiers
At the temperature
extremes
1.65
2.5
3
UNIT
mV
µV/˚C
pA
pA
dB
dB
V
V
V
V
V
V
mA
(1) All limits are specified by testing or statistical analysis.
(2) Typical values represent the most likely parametric normal.
6.9 DC Electrical Characteristics for LMC6484I
Unless otherwise specified, all limits specified for T_J = 25°C, V⁺ = 3 V, V^− = 0 V, V_CM = V_O = V⁺/2 and R_L > 1 M.
PARAMETER
TEST CONDITIONS
MIN ⁽¹⁾
TYP ⁽²⁾
MAX ⁽¹⁾
V_OS
Input offset voltage
At the temperature extremes
0.9
3
3.7
TCV_OS
I_B
I_OS
CMRR
PSRR
V_CM
Input offset voltage average drift
Input bias current
Input offset current
Common-mode rejection ratio
Power supply rejection ratio
Input common-mode voltage
range
0 V ≤ V_CM ≤ 3 V
3 V ≤ V⁺ ≤ 15 V, V^− = 0 V
For CMRR ≥ 50 dB
2
0.02
0.01
60
74
60
80
V^− − 0.25
0
V⁺ V⁺ + 0.25
V_O
Output swing
R_L = 2 kΩ to V⁺/2
R_L = 600 Ω to V⁺/2
2.8
0.2
2.5
2.7
0.37
0.6
I_S
Supply current
All four amplifiers _{At the temperature}
extremes
1.65
2.5
3
UNIT
mV
µV/˚C
pA
pA
dB
dB
V
V
V
V
V
V
mA
(1) All limits are specified by testing or statistical analysis.
(2) Typical values represent the most likely parametric normal.
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