DRV8301_12 Datasheet, PDF (11/26 Pages) Texas Instruments – Three Phase Pre-Driver with Dual Current Shunt Amplifiers and Buck Regulator

DRV8301
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SPI CHARACTERISTICS (Slave Mode Only) (continued)
PARAMETER
TEST CONDITIONS
t_{SU_SDI}
t_{HD_SDI}
t_{D_SDO}
SDI input data setup time
SDI input data hold time
SDO output data delay time, CLK high to
SDO valid
C_L = 20 pF
t_{HD_SDO}
t_{SU_SCS}
t_{HD_SCS}
t_{HI_SCS}
SDO output data hold time
SCS setup time
SCS hold time
SCS minimum high time before SCS active
low
t_ACC
SCS access time, SCS low to SDO out of
high impedance
t_DIS
SCS disable time, SCS high to SDO high
impedance
SCS
t_{HI_SCS}
_
t_{SU_SCS}
SLOS719 – AUGUST 2011
MIN TYP MAX UNIT
20
ns
30
ns
20 ns
40
50
ns
50
ns
40
ns
10
ns
10
ns
t_{HD_SCS}
SCLK
t_CLK
t_CLKH
t_CLKL
SDI
SDO
Z
t_ACC
MSB in
(must be valid)
LSB
t_{SU_SDI} t_{HD_SDI}
MSB out (is valid)
LSB
t_{D_SDO}
t_{HD_SDO}
Figure 2. SPI Slave Mode Timing Definition
Z
t_DIS
SCS
1
2
3
4
X
15
16
SCLK
SDI
MSB
LSB
SDO
Receive
latch Points
MSB
LSB
Figure 3. SPI Slave Mode Timing Diagram
Copyright © 2011, Texas Instruments Incorporated
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