DAC39J82_16 Datasheet, PDF (108/147 Pages) Texas Instruments – Digital-to-Analog Converter

DAC39J82
SLASE47 – JANUARY 2015
7.5.1.93 config92 Register – Address: 0x5C, Default: 0x1111
15
reserved
7
err_cnt_
clr_link1
Register
Name
config92
Addr
(Hex)
0x5C
Figure 173. config92 Register Format
14
13
12
11
10
reserved
reserved
6
5
4
3
2
sysref_ mode_link1
err_cnt_
clr_link0
Table 122. config92 Register Field Descriptions
9
reserved
1
2:0
Bit Name
Function
15
14:12
11
10:8
7
6:4
3
2:0
reserved
reserved
reserved
reserved
err_cnt_ clr_link1
sysref_
mode_link1
err_cnt_ clr_link0
sysref_
mode_link0
Reserved
Reserved
Reserved
Reserved
A transition from 0≥1 causes the error_cnt for link1 to be cleared.
Determines how SYSREF is used in the JESD synchronizing block.
000 = Don’t use SYSREF pulse
001 = Use all SYSREF pulses
010 = Use only the next SYSREF pulse
011 = Skip one SYSREF pulse then use only the next one
100 = Skip one SYSREF pulse then use all pulses.
101 = Skip two SYSREF pulses then use only the next one
110 = Skip two SYSREF pulses then use all pulses.
A transition from 0≥1 causes the error_cnt for link0 to be cleared.
Determines how SYSREF is used in the JESD synchronizing block.
000 = Don’t use SYSREF pulse
001 = Use all SYSREF pulses
010 = Use only the next SYSREF pulse
011 = Skip one SYSREF pulse then use only the next one
100 = Skip one SYSREF pulse then use all pulses.
101 = Skip two SYSREF pulses then use only the next one
110 = Skip two SYSREF pulses then use all pulses.
7.5.1.94 config93 Register – Address: 0x5D, Default: 0x0000
Figure 174. config93 Register Format
15
14
13
12
11
10
9
reserved
7
6
5
4
3
2
1
reserved
Register
Name
config93
Addr
(Hex)
0x5D
Table 123. config93 Register Field Descriptions
Bit Name
15:0 reserved
Function
Reserved
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8
0
Default
Value
0
001
0
001
0
001
0
001
8
0
Default
Value
0x0000
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