AM3359_1211 Datasheet, PDF (106/222 Pages) Texas Instruments – AM335x ARM Cortex-A8 Microprocessors (MPUs)

AM3359, AM3358, AM3357
AM3356, AM3354, AM3352
SPRS717D – OCTOBER 2011 – REVISED MAY 2012
RTC_XTALIN
AM335x
(ZCE Package)
RTC_XTALOUT
R_pd
N/C
Figure 4-16. OSC1 (ZCE Package) Not Used Schematic
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RTC_XTALIN
AM335x
(ZCZ Package)
VSS_RTC RTC_XTALOUT
R_pd
N/C
Figure 4-17. OSC1 (ZCZ Package) Not Used Schematic
4.2.3 Output Clock Specifications
The AM335x device has two clock output signals. The CLKOUT1 signal is always a replica of the OSC0
input clock which is referred to as the master oscillator (CLK_M_OSC) in the AM335x ARM Cortex-A8
Microprocessors (MPUs) Technical Reference Manual (literature number SPRUH73). The CLKOUT2
signal can be configured to output the OSC1 input clock, which is referred to as the 32K oscillator
(CLK_32K_RTC) in the AM335x ARM Cortex-A8 Microprocessors (MPUs) Technical Reference Manual
(literature number SPRUH73), or four other internal clocks. For more information related to configuring
these clock output signals, see the CLKOUT Signals section of the AM335x ARM Cortex-A8
Microprocessors (MPUs) Technical Reference Manual (literature number SPRUH73).
4.2.4 Output Clock Characteristics
4.2.4.1 CLKOUT1
The CLKOUT1 signal can be output on the XDMA_EVENT_INTR0 terminal. This terminal connects to one
of seven internal signals via configurable multiplexers. The XDMA_EVENT_INTR0 multiplexer must be
configured for Mode 3 to connect the CLKOUT1 signal to the XDMA_EVENT_INTR0 terminal.
The default reset configuration of the XDMA_EVENT_INTR0 multiplexer is selected by the logic level
applied to the LCD_DATA5 terminal on the rising edge of PWRONRSTn. The XDMA_EVENT_INTR0
multiplexer is configured to Mode 7 if the LCD_DATA5 terminal is low on the rising edge of PWRONRSTn
or Mode 3 if the LCD_DATA5 terminal is high on the rising edge of PWRONRSTn. This allows the
CLKOUT1 signal to be output on the XDMA_EVENT_INTR0 terminal without software intervention. In this
mode, the output is held low while PWRONRSTn is active and begins to toggle after PWRONRSTn is
released.
4.2.4.2 CLKOUT2
The CLKOUT2 signal can be output on the XDMA_EVENT_INTR1 terminal. This terminal connects to one
of seven internal signals via configurable multiplexers. The XDMA_EVENT_INTR1 multiplexer must be
configured for Mode 3 to connect the CLKOUT2 signal to the XDMA_EVENT_INTR1 terminal.
106 Power and Clocking
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