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| TM4C1231D5PZ_15 Datasheet, PDF (1045/1173 Pages) Texas Instruments – Tiva™ TM4C1231D5PZ Microcontroller | |||
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Tiva⢠TM4C1231D5PZ Microcontroller
tTSeg1 = tProp + tPhase1
tTSeg1 = (1 * tq) + (4 * tq)
tTSeg1 = 5 * tq
tTSeg2 = tPhase2
tTSeg2 = (Information Processing Time + 4) Ã tq
tTSeg2 = 4 * tq
\\Assumes IPT=0
tSJW = 4 * tq
\\Least of 4, Phase1, and Phase2
TSEG2
TSEG1
SJW
BRP
= TSeg2 -1
= 4-1
=3
= TSeg1 -1
= 5-1
=4
= SJW -1
= 4-1
=3
= Baud rate prescaler - 1
= 50-1
=49
The final value programmed into the CANBIT register = 0x34F1.
17.4
Register Map
Table 17-5 on page 1045 lists the registers. All addresses given are relative to the CAN base address
of:
â CAN0: 0x4004.0000
Note that the CAN controller clock must be enabled before the registers can be programmed (see
page 334). There must be a delay of 3 system clocks after the CAN module clock is enabled before
any CAN module registers are accessed.
Table 17-5. CAN Register Map
Offset Name
Type
0x000 CANCTL
RW
0x004 CANSTS
RW
0x008 CANERR
RO
0x00C CANBIT
RW
0x010 CANINT
RO
0x014 CANTST
RW
0x018 CANBRPE
RW
0x020 CANIF1CRQ
RW
0x024 CANIF1CMSK
RW
Reset
0x0000.0001
0x0000.0000
0x0000.0000
0x0000.2301
0x0000.0000
0x0000.0000
0x0000.0000
0x0000.0001
0x0000.0000
Description
CAN Control
CAN Status
CAN Error Counter
CAN Bit Timing
CAN Interrupt
CAN Test
CAN Baud Rate Prescaler Extension
CAN IF1 Command Request
CAN IF1 Command Mask
See
page
1047
1049
1052
1053
1054
1055
1057
1058
1059
June 12, 2014
Texas Instruments-Production Data
1045
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