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LM3S9BN5 Datasheet, PDF (1043/1380 Pages) Texas Instruments – Stellaris® LM3S9BN5 Microcontroller
Stellaris® LM3S9BN5 Microcontroller
OTG A /
Host
OTG B /
Device
Register 180: USB Maximum Receive Data Endpoint 1 (USBRXMAXP1), offset
0x114
Register 181: USB Maximum Receive Data Endpoint 2 (USBRXMAXP2), offset
0x124
Register 182: USB Maximum Receive Data Endpoint 3 (USBRXMAXP3), offset
0x134
Register 183: USB Maximum Receive Data Endpoint 4 (USBRXMAXP4), offset
0x144
Register 184: USB Maximum Receive Data Endpoint 5 (USBRXMAXP5), offset
0x154
Register 185: USB Maximum Receive Data Endpoint 6 (USBRXMAXP6), offset
0x164
Register 186: USB Maximum Receive Data Endpoint 7 (USBRXMAXP7), offset
0x174
Register 187: USB Maximum Receive Data Endpoint 8 (USBRXMAXP8), offset
0x184
Register 188: USB Maximum Receive Data Endpoint 9 (USBRXMAXP9), offset
0x194
Register 189: USB Maximum Receive Data Endpoint 10 (USBRXMAXP10),
offset 0x1A4
Register 190: USB Maximum Receive Data Endpoint 11 (USBRXMAXP11),
offset 0x1B4
Register 191: USB Maximum Receive Data Endpoint 12 (USBRXMAXP12),
offset 0x1C4
Register 192: USB Maximum Receive Data Endpoint 13 (USBRXMAXP13),
offset 0x1D4
Register 193: USB Maximum Receive Data Endpoint 14 (USBRXMAXP14),
offset 0x1E4
Register 194: USB Maximum Receive Data Endpoint 15 (USBRXMAXP15),
offset 0x1F4
The USBRXMAXPn is a 16-bit register which defines the maximum amount of data that can be
transferred through the selected receive endpoint in a single operation.
Bits 10:0 define (in bytes) the maximum payload transmitted in a single transaction. The value set
can be up to 1024 bytes but is subject to the constraints placed by the USB Specification on packet
sizes for bulk, interrupt and isochronous transfers in full-speed operations.
The total amount of data represented by the value written to this register must not exceed the FIFO
size for the receive endpoint, and must not exceed half the FIFO size if double-buffering is required.
January 21, 2012
Texas Instruments-Production Data
1043