TM4C1233H6PZ Datasheet, PDF (1035/1243 Pages) Texas Instruments – Tiva Microcontroller

Tiva^™ TM4C1233H6PZ Microcontroller
Register 20: I²C Slave Own Address 2 (I2CSOAR2), offset 0x81C
This register consists of seven address bits that identify the alternate address for the I²C device on
the I²C bus.
I2C Slave Own Address 2 (I2CSOAR2)
I2C 0 base: 0x4002.0000
I2C 1 base: 0x4002.1000
I2C 2 base: 0x4002.2000
I2C 3 base: 0x4002.3000
I2C 4 base: 0x400C.0000
I2C 5 base: 0x400C.1000
Offset 0x81C
Type RW, reset 0x0000.0000
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
reserved
Type RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
OAR2EN
OAR2
Type RO
RO
RO
RO
RO
RO
RO
RO
RW
RW
RW
RW
RW
RW
RW
RW
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit/Field
31:8
7
Name
reserved
OAR2EN
Type
RO
RW
Reset Description
0x0000.00 Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0
I²C Slave Own Address 2 Enable
Value Description
0 The alternate address is disabled.
1 Enables the use of the alternate address in the OAR2 field.
6:0
OAR2
RW
0x00
I²C Slave Own Address 2
This field specifies the alternate OAR2 address.
June 12, 2014
Texas Instruments-Production Data
1035