PCI1520-EP Datasheet, PDF (100/138 Pages) Texas Instruments – PC Card Controllers

Table 5−1. ExCA Registers and Offsets (Continued)
EXCA REGISTER NAME
Memory window 3 end-address high byte
Memory window 3 offset-address low byte
Memory window 3 offset-address high byte
Reserved
Reserved
Memory window 4 start-address low byte
Memory window 4 start-address high byte
Memory window 4 end-address low byte
Memory window 4 end-address high byte
Memory window 4 offset-address low byte
Memory window 4 offset-address high byte
I/O window 0 offset-address low byte
I/O window 0 offset-address high byte
I/O window 1 offset-address low byte
I/O window 1 offset-address high byte
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Memory window page 0
Memory window page 1
Memory window page 2
Memory window page 3
Memory window page 4
PCI MEMORY ADDRESS
OFFSET (HEX)
82B
82C
82D
82E
82F
830
831
832
833
834
835
836
837
838
839
83A
83B
83C
83D
83E
83F
840
841
842
843
844
ExCA OFFSET (HEX)
CARD A CARD B
2B
6B
2C
6C
2D
6D
2E
6E
2F
6F
30
70
31
71
32
72
33
73
34
74
35
75
36
76
37
77
38
78
39
79
3A
7A
3B
7B
3C
7C
3D
7D
3E
7E
3F
7F
−
−
−
−
−
−
−
−
−
−
A bit description table, typically included when a register contains bits of more than one type or purpose, indicates
bit field names, which appear in the signal column; a detailed field description, which appears in the function column;
and field access tags, which appear in the type column of the bit description table. Table 4−2 describes the field
access tags.
5−4