DRV8832-Q1 Datasheet, PDF (10/20 Pages) Texas Instruments – Low-Voltage Motor Driver IC

DRV8832-Q1
SLVSBW9C – APRIL 2013 – REVISED DECEMBER 2015
www.ti.com
7.3.5 Current Limit
A current limit circuit is provided to protect the system in the event of an overcurrent condition, such as what
would be encountered if driving a DC motor at start-up or with an abnormal mechanical load (stall condition).
The motor current is sensed by monitoring the voltage across an external sense resistor. When the voltage
exceeds a reference voltage of 200 mV for more than approximately 3 µs, the PWM duty cycle is reduced to limit
the current through the motor to this value. This current limit allows for starting the motor while controlling the
current.
If the current limit condition persists for some time, it is likely that a fault condition has been encountered, such
as the motor being run into a stop or a stalled condition. An overcurrent event must persist for approximately
275 ms before the fault is registered. After approximately 275 ms, a fault signaled to the host by driving the
FAULTn signal low. Operation of the motor driver will continue.
The current limit fault condition is self-clearing and will be released when the abnormal load (stall condition) is
removed.
The resistor used to set the current limit must be less than 1 Ω. Its value may be calculated as follows:
200 mV
R=
ISENSE
¾ _I
LIMIT
where
• R_ISENSE is the current sense resistor value
• I_LIMIT is the desired current limit (in mA)
(1)
If the current limit feature is not needed, the ISENSE pin may be directly connected to ground.
7.3.6 Protection Circuits
The DRV8832-Q1 is fully protected against undervoltage, overcurrent and overtemperature events.
7.3.6.1 Overcurrent Protection (OCP)
An analog current limit circuit on each FET limits the current through the FET by removing the gate drive. If this
analog current limit persists for longer than the OCP time, all FETs in the H-bridge will be disabled, and the
FAULTn signal will be driven low. The device will remain disabled until VCC is removed and re-applied.
Overcurrent conditions are sensed independently on both high and low side devices. A short to ground, supply,
or across the motor winding will all result in an overcurrent shutdown. Note that OCP is independent of the
current limit function, which is typically set to engage at a lower current level; the OCP function is intended to
prevent damage to the device under abnormal (for example, short circuit) conditions.
7.3.6.2 Thermal Shutdown (TSD)
If the die temperature exceeds safe limits, all FETs in the H-bridge will be disabled and the FAULTn signal will be
driven low. Once the die temperature has fallen to a safe level operation will automatically resume.
7.3.6.3 Undervoltage Lockout (UVLO)
If at any time the voltage on the VCC pins falls below the undervoltage lockout threshold voltage, all circuitry in
the device will be disabled, the FAULTn signal will be driven low, and internal logic will be reset. Operation will
resume when VCC rises above the UVLO threshold.
FAULT
VCC undervoltage
(UVLO)
Overcurrent (OCP)
Thermal shutdown
(TSD)
CONDITION
VCC < V_UVLO
I_OUT > I_OCP
T_J > T_TSD
Table 2. Device Protection
ERROR REPORT
H-BRIDGE
INTERNAL CIRCUITS
FAULTn
Disabled
Disabled
FAULT n
Disabled
Operating
FAULTn
Disabled
Operating
RECOVERY
VCC > V_UVLO
Power cycle VCC
T_J > T_TSD – T_HYS
10
Submit Documentation Feedback
Copyright © 2013–2015, Texas Instruments Incorporated
Product Folder Links: DRV8832-Q1