DAC904 Datasheet, PDF (10/23 Pages) Burr-Brown (TI) – 14-Bit, 165MSPS DIGITAL-TO-ANALOG CONVERTER

TYPICAL CHARACTERISTICS: V_D = V_A = +3V (Cont.)
At T_A = +25°C, Differential I_OUT = 20mA, 50Ω double-terminated load, SFDR up to Nyquist, unless otherwise specified.
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
0
FOUR-TONE OUTPUT SPECTRUM
f_CLOCK = 50MSPS
f_OUT1 = 6.25MHz
f_OUT2 = 6.75MHz
f_OUT3 = 7.25MHz
f_OUT4 = 7.75MHz
SFDR = 67dBc
Amplitude = 0dBFS
5
10
15
20
25
Frequency (MHz)
APPLICATION INFORMATION
THEORY OF OPERATION
The architecture of the DAC904 uses the current steering
technique to enable fast switching and a high update rate. The
core element within the monolithic DAC is an array of seg-
mented current sources that are designed to deliver a full-scale
output current of up to 20mA, as shown in Figure 1. An internal
decoder addresses the differential current switches each time
the DAC is updated and a corresponding output current is
formed by steering all currents to either output summing node,
I_OUT or I_OUT. The complementary outputs deliver a differential
output signal that improves the dynamic performance through
reduction of even-order harmonics, common-mode signals
(noise), and double the peak-to-peak output signal swing by a
factor of two, compared to single-ended operation.
The segmented architecture results in a significant reduction
of the glitch energy, and improves the dynamic performance
(SFDR) and DNL. The current outputs maintain a very high
output impedance of greater than 200kΩ.
The full-scale output current is determined by the ratio of the
internal reference voltage (1.24V) and an external resistor,
R_SET. The resulting I_REF is internally multiplied by a factor of
32 to produce an effective DAC output current that can range
from 2mA to 20mA, depending on the value of R_SET.
The DAC904 is split into a digital and an analog portion, each
of which is powered through its own supply pin. The digital
section includes edge-triggered input latches and the de-
coder logic, while the analog section comprises the current
source array with its associated switches and the reference
circuitry.
Full-Scale
Adjust
Resistor
R_SET
2kΩ
+3V to +5V
Analog
0.1µF⁽¹⁾
+3V to +5V
Digital
Bandwidth
Control
DAC904 +VA
BW
+V_D
I_OUT
FSA
Ref
Input REF_IN
Ref
Control
Amp
0.1µF
INT/EXT _Ref
400pF
PMOS
Current
Source
Array
LSB
Switches
I_OUT
Segmented
MSB
Switches
50Ω
0.1µF
BYP
20pF⁽¹⁾
50Ω
Buffer
Latches and Switch
+1.24V Ref
Decoder Logic
PD
Power Down
(internal pull-down)
AGND
CLK
14-Bit Data Input _DGND
Analog
Ground
Clock
Input
D13...D0
Digital
Ground
1:1
V_OUT
20pF⁽¹⁾
NOTE: Supply bypassing not shown.
FIGURE 1. Functional Block Diagram of the DAC904.
10
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NOTE: (1) Optional.
DAC904
SBAS095C