VSP5010 Datasheet, PDF (1/25 Pages) Texas Instruments – 12-Bit, 31-MSPS, Dual-Channel CCD ANALOG FRONT-END FOR DIGITAL COPIERS

VSP5010
VSP5010
www.ti.com ................................................................................................................................................................................................ SBES014 – AUGUST 2008
12-Bit, 31-MSPS, Dual-Channel
CCD ANALOG FRONT-END FOR DIGITAL COPIERS
FEATURES
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•2 Dual-Channel CCD Processing:
– Correlated Double Sampler (CDS)
– Sample-and-Hold Mode (S/H)
– Digital Programmable Amplifier
– CCD Offset Correction (OB Loop)
• High-Performance ADC:
– 12-Bit Resolution
– INL: ±2 LSB
– DNL: ±0.5 LSB
– No Missing Codes Ensured
• High-Speed Operation:
– Sample Rate: 31 MHz (max, Design
Ensured)
– 78-dB SNR (at 0-dB Gain)
• Low-Power Consumption:
– Low Voltage: 3.0 V to 3.6 V
– Low Power: 290 mW (typ at 3.3 V)
– Standby Mode: 20 mW (typ)
APPLICATIONS
• Copiers
• Scanners
• Facsimiles
DESCRIPTION
The VSP5010 is a complete application-specific
standard product (ASP) for charge-coupled device
(CCD) line sensor applications such as copiers,
scanners, and facsimiles. The VSP5010 provides two
independent line-processing channels, and performs
analog front-end (AFE) data processing and
analog-to-digital conversion. Each channel features
correlated double sampling (CDS) and
sample-and-hold (S/H) processing stages, 14
analog-to-digital converter (ADC) blocks, a digital
programmable gain amplifier (DPGA), and an optical
black (OB) correction loop. Data are output in a 12-bit
word; two-channel ADC data are multiplexed and
then output.
The VSP5010 operates from a single 3.3-V supply.
The device is available in an LQFP-64 package.
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PRODUCT PREVIEW information concerns products in the
formative or design phase of development. Characteristic data and
other specifications are design goals. Texas Instruments reserves
the right to change or discontinue these products without notice.
Copyright © 2008, Texas Instruments Incorporated