LMK03200_14 Datasheet, PDF (1/50 Pages) Texas Instruments – Family Precision 0-Delay Clock Conditioner with Integrated VCO

LMK03200
www.ti.com
SNAS478B – JULY 2009 – REVISED AUGUST 2009
LMK03200 Family Precision 0-Delay Clock Conditioner with Integrated VCO
Check for Samples: LMK03200
FEATURES
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•2 Integrated VCO with Very Low Phase Noise
Floor
• Integrated Integer-N PLL with Outstanding
Normalized Phase Noise Contribution of -224
dBc/Hz
• VCO Divider Values of 2 to 8 (All Divides)
– Bypassable with VCO Mux When Not in 0-
delay Mode
• Channel Divider Values of 1, 2 to 510 (Even
Divides)
• LVDS and LVPECL Clock Outputs
• Partially Integrated Loop Filter
• Dedicated Divider and Delay Blocks on Each
Clock Output
• 0-delay Outputs
• Internal or External Feedback of Output Clock
• Delay Blocks on N and R Phase Detector
Inputs for Lead/Lag Global Skew Adjust
• Pin Compatible Family of Clocking Devices
• 3.15 to 3.45 V Operation
• Package: 48 Pin WQFN (7.0 x 7.0 x 0.8 mm)
• 200 fs RMS Clock Generator Performance (10
Hz to 20 MHz) with a clean input clock
TARGET APPLICATIONS
• Data Converter Clocking
• Networking, SONET/SDH, DSLAM
• Wireless Infrastructure
• Medical
• Test and Measurement
• Military / Aerospace
DESCRIPTION
The LMK03200 family of precision clock conditioners
combine the functions of jitter cleaning/reconditioning,
multiplication, and 0-delay distribution of a reference
clock. The devices integrate a Voltage Controlled
Oscillator (VCO), a high performance Integer-N
Phase Locked Loop (PLL), a partially integrated loop
filter, and up to eight outputs in various LVDS and
LVPECL combinations.
The VCO output is optionally accessible on the Fout
port. Internally, the VCO output goes through a VCO
divider to feed the various clock distribution blocks.
Each clock distribution block includes a
programmable divider, a phase synchronization
circuit, a programmable delay, a clock output mux,
and an LVDS or LVPECL output buffer. The PLL also
features delay blocks to permit global phase
adjustment of clock output phase. This allows multiple
integer-related and phase-adjusted copies of the
reference to be distributed to eight system
components.
The clock conditioners come in a 48-pin WQFN
package and are footprint compatible with other
clocking devices in the same family.
Device
LMK03200
Outputs
3 LVDS
5 LVPECL
VCO
Tuning Range RMS Jitter
(MHz)
(fs)
1185 - 1296
800
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2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009, Texas Instruments Incorporated