LMK00304 Datasheet, PDF (1/25 Pages) Texas Instruments – 3-GHz 4-Output Differential Clock Buffer/Level Translator

LMK00304
March 12, 2012
3-GHz 4-Output Differential Clock Buffer/Level Translator
1.0 General Description
■ ^{Servers, Workstations, and Computing}
The LMK00304 is a 3-GHz 4-output differential fanout buffer
intended for high-frequency, low-jitter clock/data distribution
and level translation. The input clock can be selected from
two universal inputs or one crystal input. The selected input
clock is distributed to two banks of 2 differential outputs and
one LVCMOS output. The differential output banks can be
mutually configured as LVPECL, LVDS, or HCSL drivers, or
disabled. The LVCMOS output has a synchronous enable in-
put for runt-pulse-free operation when enabled or disabled.
The LMK00304 operates from a 3.3 V core supply and 3 in-
dependent 3.3 V/2.5 V output supplies.
The LMK00304 provides high performance, versatility, and
power efficiency, making it ideal for replacing fixed-output
buffer devices while increasing timing margin in the system.
2.0 Target Applications
■ ^{Clock Distribution and Level Translation for high-speed}
ADCs, DACs, Serial Interfaces (Multi-Gigabit Ethernet,
XAUI, Fibre Channel, PCIe, SATA/SAS, SONET/SDH,
CPRI), and high-frequency backplanes
■ ^{Remote Radio Units (RRU) and Baseband Units (BBU)}
■ ^{Switches and Routers}
3.0 Features
■ ^{3:1 Input Multiplexer}
— Two universal inputs operate up to 3.1 GHz and accept
LVPECL, LVDS, CML, SSTL, HSTL, HCSL (AC-
coupled), or single-ended clocks
— One crystal input accepts a 10 to 40 MHz crystal or
single-ended clock
■ ^{Two Banks with 2 Differential Outputs each}
— LVPECL, LVDS, HCSL, or Hi-Z (selectable)
— LVPECL Additive Jitter with LMK03806 clock source:
■ ^{20 fs RMS at 156.25 MHz (10 kHz – 1 MHz)}
■ ^{51 fs RMS at 156.25 MHz (12 kHz – 20 MHz)}
■ ^{High PSRR: -65 / -76 dBc (LVPECL/LVDS) at 156.25 MHz}
■ ^{LVCMOS output with synchronous enable input}
■ ^{Pin-controlled configuration}
■ ^V_CC ^{Core Supply: 3.3 V ± 5%}
■ ^{3 Independent V}_CCO ^{Output Supplies: 3.3 V/2.5 V ± 5%}
■ ^{Industrial temperature range: -40°C to +85°C}
■ ^{Package: 32-pin LLP (5.0 x 5.0 x 0.8 mm)}
4.0 Functional Block Diagram
© 2012 Texas Instruments Incorporated 301773 SNAS577B
30177301
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