DS90C402_13 Datasheet, PDF (1/14 Pages) Texas Instruments – Dual Low Voltage Differential Signaling (LVDS) Receiver

DS90C402
www.ti.com
SNLS001C – JUNE 1998 – REVISED APRIL 2013
DS90C402 Dual Low Voltage Differential Signaling (LVDS) Receiver
Check for Samples: DS90C402
FEATURES
1
•2 Ultra Low Power Dissipation
• Operates above 155.5 Mbps
• Standard TIA/EIA-644
• 8 Lead SOIC Package saves PCB space
• V_CM ±1V center around 1.2V
• ±100 mV Receiver Sensitivity
DESCRIPTION
The DS90C402 is a dual receiver device optimized
for high data rate and low power applications. This
device along with the DS90C401 provides a pair chip
solution for a dual high speed point-to-point interface.
The device is in a PCB space saving 8 lead small
outline package. The receiver offers ±100 mV
threshold sensitivity, in addition to common-mode
noise protection.
Connection Diagram
Functional Diagram
See Package Number D (SOIC)
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1998–2013, Texas Instruments Incorporated