CD74HC4017-Q1 Datasheet, PDF (1/14 Pages) Texas Instruments – HIGH-SPEED CMOS LOGIC DECADE COUNTER/DIVIDER WITH 10 DECODED OUTPUTS

CD74HC4017-Q1
HIGH-SPEED CMOS LOGIC DECADE COUNTER/DIVIDER
WITH 10 DECODED OUTPUTS
SCLS546SA − OCTOBER 2003 − REVISED APRIL 2008
D Qualified for Automotive Applications
D Significant Power Reduction Compared to
D Fully Static Operation
D Buffered Inputs
D Common Reset
D Positive Edge Clocking
LSTTL Logic ICs
D V_CC Voltage = 2 V to 6 V
D High Noise Immunity N_IL or N_IH = 30% of
V_CC, V_CC = 5 V
D Typical f_MAX = 60 MHz at V_CC = 5 V,
C_L = 15 pF, T_A = 25°C
D Fanout (Over Temperature Range)
− Standard Outputs . . . 10 LSTTL Loads
− Bus Driver Outputs . . . 15 LSTTL Loads
D Balanced Propagation Delay and Transition
Times
M OR PW PACKAGE
(TOP VIEW)
51
12
03
24
65
16 V_CC
15 MR
14 CP
13 CE
12 TC
description/ordering information
76
37
11 9
10 4
The CD74HC4017 is a high-speed silicon-gate
GND 8
98
CMOS 5-stage Johnson counter with ten decoded
outputs. Each of the decoded outputs normally is low
and sequentially goes high on the low-to-high transition clock period of the ten-clock-period cycle. The carry
(TC) output transitions low to high after output 9 goes from high to low, and can be used in conjunction with the
clock enable (CE) input to cascade several stages. CE disables counting when in the high state. A master reset
(MR) input also is provided that, when taken high, sets all the decoded outputs, except output 0, to low.
The device can drive up to ten low-power Schottky equivalent loads.
ORDERING INFORMATION^{
T_A
PACKAGE^‡
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
−40°C to 125°C
SOIC − M
Tape and reel
TSSOP − PW Tape and reel
CD74HC4017QM96Q1 HC4017Q
CD74HC4017QPWRQ1 HC4017Q
† _{For the most current package and ordering information, see the Package Option Addendum at the}
end of this document, or see the TI web site at http://www.ti.com.
‡ _{Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.}
FUNCTION TABLE
INPUTS
CP CE MR
OUTPUT STATE^†
L
X
L
No change
X
H
L
No change
X
X
H
0 = H, 1−9 = L
↑
L
L
Increments counter
↓
X
L
No change
X
↑
L
No change
H
↓
L
Increments counter
NOTE: H = high voltage level, L = low voltage level,
X = don’t care, ↑ = transition from low to high
level, ↓ = transition from high to low level
† _{If n < 5, TC = H, otherwise TC = L}
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PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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