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AM3517_16 Datasheet, PDF (1/223 Pages) Texas Instruments – AM3517, AM3505 Sitara™ Processors | |||
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AM3517, AM3505
SPRS550F â OCTOBER 2009 â REVISED JULY 2014
AM3517, AM3505 Sitara⢠Processors
1 Device Summary
1.1 Features
1
⢠AM3517/05 Sitara Processor:
â MPU Subsystem
⢠600-MHz Sitara ARM Cortex®-A8 Core
⢠NEON⢠SIMD Coprocessor and Vector
Floating-Point (FP) Coprocessor
â Memory Interfaces:
⢠166-MHz 16- and 32-Bit mDDR/DDR2
Interface with 1GB of Total Addressable
Space
⢠Up to 83 MHz General-Purpose Memory
Interface Supporting 16-Bit-Wide Multiplexed
Address/Data Bus
⢠64KB of SRAM
⢠3 Removable Media Interfaces
[MMC/SD/SDIO]
â IO Voltage:
⢠mDDR/DDR2 IOs: 1.8V
⢠Other IOs: 1.8V and 3.3V
â Core Voltage: 1.2V
â Commercial and Extended Temperature Grade
(operating restrictions apply)
â 16-Bit Video Input Port Capable of Capturing
HD Video
â HD Resolution Display Subsystem
â Serial Communication
⢠High-End CAN Controller
⢠10/100 Mbit Ethernet MAC
⢠USB OTG Subsystem with Standard DP/DM
Interface [HS/FS/LS]
⢠Multiport USB Host Subsystem [HS/FS/LS]
â 12-Pin ULPI or 6-, 4-, or 3-Pin Serial
Interface
⢠Four Master and Slave Multichannel Serial
Port Interface (McSPI) Ports
⢠Five Multichannel Buffered Serial Ports
(McBSPs)
â 512-Byte Transmit and Receive Buffer
(McBSP1/3/4/5)
â 5-KB Transmit and Receive Buffer
(McBSP2)
â SIDETONE Core Support (McBSP2 and
McBSP3 Only) For Filter, Gain, and Mix
Operations
â 128-Channel Transmit and Receive Mode
â Direct Interface to I2S and PCM Device
and TDM Buses
⢠HDQ/1-Wire Interface
1
⢠4 UARTs (One with Infrared Data
Association [IrDA] and Consumer Infrared
[CIR] Modes)
⢠3 Master and Slave High-Speed Inter-
Integrated Circuit (I2C) Controllers
⢠Twelve 32-bit General-Purpose Timers
⢠One 32-bit Watchdog Timer
⢠One 32-bit 32-kHz Sync Timer
⢠Up to 186 General-Purpose I/O (GPIO) Pins
⢠Display Subsystem
â Parallel Digital Output
â Up to 24-Bit RGB
â Supports Up to 2 LCD Panels
â Support for Remote Frame Buffer Interface
(RFBI) LCD Panels
â Two 10-Bit Digital-to-Analog Converters (DACs)
Supporting
⢠Composite NTSC/PAL Video
⢠Luma/Chroma Separate Video (S-Video)
â Rotation of 90, 180, and 270 Degrees
â Resize Images From 1/4x to 8x
â Color Space Converter
â 8-Bit Alpha Blending
⢠Video Processing Front End (VPFE) 16-Bit Video
Input Port
â RAW Data Interface
â 75-MHz Maximum Pixel Clock
â Supports REC656/CCIR656 Standard
â Supports YCbCr422 Format (8-Bit or 16-Bit with
Discrete Horizontal and Vertical Sync Signals)
â Generates Optical Black Clamping Signals
â Built-in Digital Clamping and Black Level
Compensation
â 10-Bit to 8-Bit A-law Compression Hardware
â Supports up to 16K Pixels (Image Size) in
Horizontal and Vertical Directions
⢠System Direct Memory Access (sDMA) Controller
(32 Logical Channels with Configurable Priority)
⢠Comprehensive Power, Reset, and Clock
Management
⢠ARM Cortex-A8 Memory Architecture
â ARMv7 Architecture
â In-Order, Dual-Issue, Superscalar
Microprocessor Core
â ARM NEON Multimedia Architecture
â Over 2x Performance of ARMv6 SIMD
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
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