TMS320F243 Datasheet, PDF (94/116 Pages) Texas Instruments – DSP CONTROLLERS

TMS320F243, TMS320F241
DSP CONTROLLERS
SPRS064B – DECEMBER 1997 – REVISED FEBRUARY 1999
external memory interface read timings
switching characteristics over recommended operating conditions for an external memory
interface read (see Figure 38)
PARAMETER
td(COL–CNTL) Delay time, CLKOUT low to control valid
td(COL–CNTH)
td(COL–A)RD
td(COH–RDL)
Delay time, CLKOUT low to control inactive
Delay time, CLKOUT low to address valid
Delay time, CLKOUT high to RD strobe active
td(COL–RDH) Delay time, CLKOUT low to RD strobe inactive high
td(COL–SL)
Delay time, CLKOUT low to STRB strobe active low
td(COL–SH) Delay time, CLKOUT low to STRB strobe inactive high
th(A)COL
tsu(A)RD
th(A)RD
Hold time, address valid after CLKOUT low
Setup time, address valid before RD strobe active low
Hold time, address valid after RD strobe inactive high
MIN MAX UNIT
3 ns
3 ns
5 ns
4 ns
–4
0 ns
3 ns
3 ns
–4
ns
22
ns
–1
ns
timing requirements [H = 0.5t_c(CO)] (see Figure 38)
ta(A)
tsu(D)RD
th(D)RD
th(AIV-D)
Access time, read data from address valid
Setup time, read data before RD strobe inactive high
Hold time, read data after RD strobe inactive high
Hold time, read data after address invalid
MIN MAX
2H–20
12
0
–3
UNIT
ns
ns
ns
ns
94
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