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SN74AUP3G06 Datasheet, PDF (9/13 Pages) Texas Instruments – LOW-POWER TRIPLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUTS
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From Output
Under Test
CL
(see Note A)
SN74AUP3G06
SCES775A – DECEMBER 2009 – REVISED DECEMBER 2009
PARAMETER MEASUREMENT INFORMATION
(Enable and Disable Times)
5 kΩ
5 kΩ
2 x VCC
S1
GND
TEST
tPLZ/tPZL
tPHZ/tPZH
S1
2 x VCC
GND
LOAD CIRCUIT
VCC = 0.8 V
VCC = 1.2 V
± 0.1 V
VCC = 1.5 V
± 0.1 V
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
CL 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF 5, 10, 15, 30 pF
VM
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2
VI
VCC
VCC
VCC
VCC
VCC
VCC
V∆
0.1 V
0.1 V
0.1 V
0.15 V
0.15 V
0.3 V
Output
Control
VCC/2
VCC/2
VCC
0V
tPZL
Output
Waveform 1
S1 at 2 xVCC
(see Note B)
VCC/2
tPLZ
VOL + V∆
VCC
VOL
Output
Waveform 2
S1 at GND
(see Note B)
tPZH
VCC/2
tPHZ
VOH - V∆
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
VOH
≈0 V
A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output
control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the
output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr/tf = 3 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPLH and tPHL are the same as tpd.
G. All parameters and waveforms are not applicable to all devices.
Figure 4. Load Circuit and Voltage Waveforms
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): SN74AUP3G06
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