SN74AUP3G06 Datasheet, PDF (2/13 Pages) Texas Instruments – LOW-POWER TRIPLE INVERTER BUFFER/DRIVER WITH OPEN-DRAIN OUTPUTS

SN74AUP3G06
SCES775A – DECEMBER 2009 – REVISED DECEMBER 2009
www.ti.com
The output of SN74AUP3G06 is open drain and can be connected to other open-drain outputs to implement
active-low wired-OR or active-high wired-AND functions.
NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
T_A
–40°C to 85°C
ORDERING INFORMATION⁽¹⁾
PACKAGE ⁽²⁾
ORDERABLE
PART NUMBER
NanoStar™ – WCSP (DSBGA)
0.23-mm Large Bump – YFP (Pb-free)
Reel of 3000
SN74AUP3G06YFPR
uQFN – DQE
Reel of 5000
SN74AUP3G06DQER
QFN – RSE
Reel of 5000
SN74AUP3G06RSER
SSOP – DCU
Reel of 3000
SN74AUP3G06DCUR
TOP-SIDE
MARKING ⁽³⁾
__HT_
TV
PREVIEW
H06_
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) DCU: The actual top-side marking has one additional character that designates the wafer fab/assembly site.
YFP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the wafer fab/assembly site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
FUNCTION TABLE
(Each Inverter)
INPUT
A
OUTPUT
Y
H
L
L
Z
LOGIC DIAGRAM (POSITIVE LOGIC)
1
1A
7
1Y
3
2A
5
2Y
6
3A
Pin numbers shown are for the DCU and DQE packages.
2
3Y
2
Submit Documentation Feedback
Product Folder Link(s): SN74AUP3G06
Copyright © 2009, Texas Instruments Incorporated