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BQ28400PWR Datasheet, PDF (9/24 Pages) Texas Instruments – Tablet PC and Netbook 2-Series Cell Li-Ion Battery Gas Gauge and Protection
bq28400
www.ti.com
SLUSA61A – OCTOBER 2010 – REVISED DECEMBER 2010
ELECTRICAL CHARACTERISTICS (continued)
Typical values stated where TA = 25ºC and VBAT = VPACK = 7.2 V, Min/Max values stated where TA = –20ºC to 85ºC and VBAT
= VPACK = 3.8 V to 18.75 V over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITION(1)
MIN
TYP
MAX
UNIT
Pre-Charge/ZVCHG FET Drive
V(PreCHGON)
VO(PreCHGON) = V(PACK)
–V(ZVCHG), pre-charge
FET on (8)
RGS = 1 MΩ, VPACK = 10 V
9
9.5
10
V
V(PreCHGOFF)
Output voltage,
pre-charge FET off (8)
RGS = 1 MΩ, TA = –20°C to 110°C
VBAT –
0.5
V
tr
tf
SMBus
Rise time
Fall time
CL = 4700 pF,
RG = 5.1 kΩ
CL = 4700 pF,
RG = 5.1 kΩ
VZVCHG: 10% to
90%
VZVCHG: 90% to
10%
80
200
µs
1.7
ms
fSMB
SMBus operating
frequency
Slave mode, SMBC 50% duty cycle
10
100
kHz
fMAS
SMBus master clock
frequency
Master mode, no clock low slave extend
51.2
kHz
tBUF
tHD:STA
tSU:STA
tSU:STO
tHD:DAT
Bus free time between start and stop
Hold time after (repeated) start
Repeated start setup time
Stop setup time
Data hold time
Receive mode
Transmit mode
4.7
µs
4
µs
4.7
µs
4
µs
0
ns
300
tSU:DAT
tTIMEOUT
tLOW
tHIGH
tLOW:SEXT
Data setup time
Error signal/detect
Clock low period
Clock high period
Cumulative clock low
slave extend time
See (9)
See (10)
See (11)
250
ns
25
35
ms
4.7
µs
4
50
µs
25
ms
tLOW:MEXT
tf
tr
Cumulative clock low
master extend time
Clock/data fall time
Clock/data rise time
See (12)
See (13)
See (14)
10
ms
300
ns
1000
ns
(8) For a VBAT or VPACK input range of 3.8 V to 18.75 V, MIN VO(FETON) voltage is 9 V or V(BAT) – 1 V, whichever is less.
(9) The bq28400 times out when any clock low exceeds tTIMEOUT.
(10) tHIGH:MAX is the minimum bus idle time. SMBC = SMBD = 1 for t > 50 µs causes reset of any transaction involving bq28400 that is in
progress.
(11) tLOW:SEXT is the cumulative time a slave device is allowed to extend the clock cycles in one message from initial start to the stop.
(12) tLOW:MEXT is the cumulative time a master device is allowed to extend the clock cycles in one message from initial start to the stop.
(13) Rise time tr = VILMAX – 0.15) to (VIHMIN + 0.15).
(14) Fall time tf = 0.9VDD to (VILMAX – 0.15).
Copyright © 2010, Texas Instruments Incorporated
9
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