BQ28400PWR Datasheet, PDF (8/24 Pages) Texas Instruments – Tablet PC and Netbook 2-Series Cell Li-Ion Battery Gas Gauge and Protection

bq28400
SLUSA61A – OCTOBER 2010 – REVISED DECEMBER 2010
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ELECTRICAL CHARACTERISTICS (continued)
Typical values stated where T_A = 25ºC and V_BAT = V_PACK = 7.2 V, Min/Max values stated where T_A = –20ºC to 85ºC and V_BAT
= V_PACK = 3.8 V to 18.75 V over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITION⁽¹⁾
MIN
TYP
MAX
UNIT
Internal Temperature Sensor
T_INT
Temperature sensor accuracy
Thermistor Measurement Support
±3%
°C
R_ERR
R
Internal resistor drift
Internal resistor
±230
18
PPM/°C
20
kΩ
Internal Thermal Shutdown
T_MAX
Maximum REG27 temperature ⁽⁶⁾
T_RECOVER
Recovery hysteresis temperature ⁽⁶⁾
Current Protection Thresholds
125
175
°C
10
V_(OCD)
OCD detection threshold voltage range, typical
ΔV_(OCDT)
OCD detection threshold voltage program step
V_(SCCT)
SCC detection threshold voltage range, typical
ΔV_(SCCT)
SCC detection threshold voltage program step
V_(SCDT)
SCD detection threshold voltage range, typical
ΔV_(SCDT)
SCD detection threshold voltage program step
V_(OFFSET)
SCD, SCC, and OCD offset
V_{(Scale_Err)}
SCD, SCC, and OCD scale error
Current Protection Timing
50
–100
100
–10
–10%
200
mV
10
mV
–300
mV
–50
mV
450
mV
50
mV
10
mV
10%
t_(OCDD)
t_{(OCDD_STEP)}
t_(SCDD)
t_{(SCDD_STEP)}
t_(SCCD)
t_{(SCCD_STEP)}
t_(DETECT)
t_ACC
Overcurrent in discharge delay
OCDD Step options
Short circuit in discharge delay
SCDD Step options
Short circuit in charge delay
SCCD Step options
Current fault detect
time
Overcurrent and short
circuit delay time
accuracy
V_SRP-SRN = V_THRESH + 12.5 mV,
T_A = –20˚C to 85˚C
Accuracy of typical delay time with no WDI input
1
0
0
–50%
31
ms
2
ms
1830
µs
122
µs
915
µs
61
µs
35
160
µs
50%
P-CH FET Drive
V_O(FETON)
Output voltage,
charge and discharge
FETs on
V_O(FETONDSG) = V_(BAT) – V_(DSG),
R_GS = 1 MΩ, T_A = –20 to 110°C,
BAT = 7.2 V ⁽⁷⁾
V_O(FETONCHG) = V_(PACK) – V_(CHG),
R_GS = 1 MΩ, T_A = –20 to 110°C,
PACK = 7.2 V⁽⁷⁾
6
6.5
BAT V
6
6.5
PACK
V
V_O(FETOFF)
Output voltage,
charge and discharge
FETs off
V_O(FETOFFDSG) = V_(BAT) – V_(DSG),
T_A = –20°C to 110°C, BAT = 7.2 V
V_O(FETOFFCHG) = V_(PACK) – V_(CHG),
T_A = –20°C to 110°C, PACK = 7.2 V
t_r
Rise time
C_L = 4700 pF
t_f
Fall time
C_L = 4700 pF
VDSG: 10% to
90%
VCHG: 10% to
90%
VDSG : 90% to
10%
VCHG: 90% to
10%
0.2
V
0.2
V
40
200
40
200
µs
40
200
40
200
(6) Specified by design. Not production tested.
(7) For a V_BAT or V_PACK input range of 3.8 V to 18.75 V, MIN V_O(FETON) voltage is 9 V or V_(BAT) – 1 V, whichever is less.
8
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