TMS320C55_15 Datasheet, PDF (87/159 Pages) Texas Instruments – TMS320C5515 Fixed-Point Digital Signal Processor

TMS320C5515
www.ti.com
SPRS645F – AUGUST 2010 – REVISED OCTOBER 2013
5.8 Wake-up Events, Interrupts, and XF
The device has a number of interrupts to service the needs of its peripherals. The interrupts can be
selectively enabled or disabled.
5.8.1 Interrupts Electrical Data/Timing
Table 5-7. Timing Requirements for Interrupts⁽¹⁾ (see Figure 5-13)
CV_DD = 1.05 V
NO.
CV_DD = 1.3 V
UNIT
MIN
MAX
1
t_w(INTH)
2
t_w(INTL)
Pulse duration, interrupt high CPU active
Pulse duration, interrupt low CPU active
2P
ns
2P
ns
(1) P = 1/SYSCLK clock frequency in ns. For example, when the CPU core is clocked at 100 MHz, use P = 10 ns. For example, when the
CPU core is clocked att 120 MHz, use P = 8.3 ns.
1
INTx
2
Figure 5-13. External Interrupt Timings
5.8.2 Wake-Up From IDLE Electrical Data/Timing
Table 5-8. Timing Requirements for Wake-Up From IDLE (see Figure 5-14)
NO.
1
t_w(WKPL)
Pulse duration, WAKEUP or INTx low, SYSCLKDIS = 1
CV_DD = 1.05 V
CV_DD = 1.3 V
MIN
MAX
30.5
UNIT
µs
Table 5-9. Switching Characteristics Over Recommended Operating Conditions For Wake-Up From
IDLE^(1)(2)(3)(4) (see Figure 5-14)
NO.
PARAMETER
2
t_d(WKEVTH-C
KLGEN)
Delay time, WAKEUP pulse complete to
CPU active
IDLE3 Mode with SYSCLKDIS = 1,
WAKEUP or INTx event, CLK_SEL =
1
IDLE3 Mode with SYSCLKDIS = 1,
WAKEUP or INTx event, CLK_SEL =
0
IDLE2 Mode; INTx event
CV_DD = 1.05 V
CV_DD = 1.3 V
UNIT
MIN TYP MAX
D
ns
C
ns
3P
ns
(1) D = 1/ External Clock Frequency (CLKIN).
(2) C = 1/RTCCLK= 30.5 μs. RTCCLK is the clock output of the 32.768-kHz RTC oscillator.
(3) P = 1/SYSCLK clock frequency in ns. For example, when the CPU core is clocked at 100 MHz, use P = 10 ns.
(4) Assumes the internal LDOs are used with a 0.1uF bandgap capacitor.
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Peripheral Information and Electrical Specifications
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