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TMS320F28069_12 Datasheet, PDF (83/174 Pages) Texas Instruments – Piccolo Microcontrollers
www.ti.com
TMS320F28069, TMS320F28068, TMS320F28067, TMS320F28066
TMS320F28065, TMS320F28064, TMS320F28063, TMS320F28062
SPRS698D – NOVEMBER 2010 – REVISED DECEMBER 2012
5.10.1 Analog-to-Digital Converter (ADC)
5.10.1.1 Features
The core of the ADC contains a single 12-bit converter fed by two sample-and-hold circuits. The sample-
and-hold circuits can be sampled simultaneously or sequentially. These, in turn, are fed by a total of up to
16 analog input channels. The converter can be configured to run with an internal bandgap reference to
create true-voltage based conversions or with a pair of external voltage references (VREFHI/VREFLO) to
create ratiometric-based conversions.
Contrary to previous ADC types, this ADC is not sequencer-based. The user can easily create a series of
conversions from a single trigger. However, the basic principle of operation is centered around the
configurations of individual conversions, called SOCs, or Start-Of-Conversions.
Functions of the ADC module include:
• 12-bit ADC core with built-in dual sample-and-hold (S/H)
• Simultaneous sampling or sequential sampling modes
• Full range analog input: 0 V to 3.3 V fixed, or VREFHI/VREFLO ratiometric. The digital value of the input
analog voltage is derived by:
– Internal Reference (VREFLO = VSSA. VREFHI must not exceed VDDA when using either internal or
external reference modes.)
Digital Value = 0,
when input £ 0 V
Digital Value = 4096 ´ Input Analog Voltage - VREFLO
3.3
when 0 V < input < 3.3 V
Digital Value = 4095,
when input ³ 3.3 V
– External Reference (VREFHI/VREFLO connected to external references. VREFHI must not exceed VDDA
when using either internal or external reference modes.)
Digital Value = 0,
when input £ 0 V
Digital Value = 4096 ´ Input Analog Voltage - VREFLO
VREFHI - VREFLO
when 0 V < input < VREFHI
Digital Value = 4095,
when input ³ VREFHI
• Runs at full system clock, no prescaling required
• Up to 16-channel, multiplexed inputs
• 16 SOCs, configurable for trigger, sample window, and channel
• 16 result registers (individually addressable) to store conversion values
• Multiple trigger sources
– S/W – software immediate start
– ePWM 1–8
– GPIO XINT2
– CPU Timer 0, CPU Timer 1, CPU Timer 2
– ADCINT1, ADCINT2
• 9 flexible PIE interrupts, can configure interrupt request after any conversion
Copyright © 2010–2012, Texas Instruments Incorporated
Peripheral and Electrical Specifications
83
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