DAC37J82_15 Datasheet, PDF (82/119 Pages) Texas Instruments – DAC3xJ82 Dual-Channel, 16-Bit, 1.6/2.5 GSPS, Digital-to-Analog Converters with 12.5 Gbps JESD204B Interface

DAC37J82, DAC38J82
SLASE16B – JANUARY 2014 – REVISED MAY 2014
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Register
Name
config62
Addr
(Hex)
0x3E
Table 93. Register Name: config62 – Address: 0x3E, Default: 0x0000
Bit Name
Function
15:0 rw_cfgrx0 Lower 16 bits of the configuration info for SerDes receivers.
Bit15:1 – LOS, enable loss of signal detection.
3
Bit12:1 – reserved.
1
Bit10:8 – TERM, select input termination options for serial lanes.
Note: AC coupling is recommended for JESD204B compliance.
Bit7
– reserved
Bit6:5 – RATE, operating rate, select full, half, quarter or eighth rate operation.
Bit4:2 – BUSWIDTH, select the parallel interface width (16 bit or 20bit).
Note: 16bit is not compatible with JESD204B.
Bit1
SLEEPRX, powers the receiver down into sleep (fast power up) state when
high.
Bit0
– reserved.
Default
Value
0x0000
Register
Name
config63
Addr
(Hex)
0x3F
Table 94. Register Name: config63 – Address: 0x3F, Default: 0x0000
Bit Name
15:8 Not Used
7:0 INVPAIR
Function
Not Used
Allows the PN pairs of the SerDes lanes to be inverted.
bit7 = lane7
bit6 = lane6
bit5 = lane5
bit4 = lane4
bit3 = lane3
bit2 = lane2
bit1 = lane1
bit0 = lane0
Default
Value
0x00
0x00
Register
Name
config64
Addr
(Hex)
0x40
Table 95. Register Name: config64 – Address: 0x40, Default: 0x0000
Bit Name
15:0 reserved
Function
Reserved
Default
Value
0x0000
Register
Name
config65
READ
ONLY
Addr
(Hex)
0x41
Table 96. Register Name: config65 – Address: 0x41, Default: 0x0000
Bit Name
15:0 errorcnt_ link0
Function
This is the error count for link0. What is counted as an error is determined
by error_ena_link0. This is a 16bit value that is cleared when a JESD
synchronization is performed or err_cnt_clr_link0 is programmed to a ‘1’.
Default
Value
0x0000
Register
Name
config66
READ
ONLY
Addr
(Hex)
0x42
Table 97. Register Name: config66 – Address: 0x42, Default: 0x0000
Bit Name
15:0 errorcnt_ link1
Function
This is the error count for link1. What is counted as an error is determined
by error_ena_link1. This is a 16bit value that is cleared when a JESD
synchronization is performed or err_cnt_clr_link0 is programmed to a ‘1’.
Default
Value
0x0000
82
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