DAC37J82_15 Datasheet, PDF (104/119 Pages) Texas Instruments – DAC3xJ82 Dual-Channel, 16-Bit, 1.6/2.5 GSPS, Digital-to-Analog Converters with 12.5 Gbps JESD204B Interface

DAC37J82, DAC38J82
SLASE16B – JANUARY 2014 – REVISED MAY 2014
www.ti.com
8.2.1.2.4 DAC PLL Setup
The reference frequency from an onboard clock chip, like the LMK04828, is 307.2 MHz. It is desired to use the
highest PFD update rate to maintain the best phase noise performance, but not too high to avoid spurs, therefore
the N Divider is chosen to be 2 for a PFD frequency of 153.6 MHz. In order to have the feedback side of the PFD
be equal to the reference side (153.6 MHz) and create a DACCLK rate of 2457.6 MHz, the M Divider must be set
to 16. Using Table 29, it is found that a VCO frequency of 4915.2 MHz can be used to generate a DACCLK
frequency of 2457.6 MHz, so the Prescalar is set to 2 and the H-band VCO is selected.
8.2.1.2.5 Serdes Lanes
It is desired to use the minimum number of serdes lanes while staying under the maximum serdes line rate
possible with the chosen FPGA. In the design requirements, the FPGA maximum serdes data rate was given as
12.5 Gbps. For the chosen input data rate of 307.2 MSPS and with 8b/10b encoding on the serdes lanes, each
DAC requires a serialized data rate of 6144 Mbps, as given by the equation below.
Serialized Data Rate = Fdata * 16 * (10 / 8)
(5)
The total serialized data rate with a dual DAC is 6144 Mbps * 2 = 12.288 Gbps. This total serialized data rate is
split among the total number of lanes. The table below shows the line rate versus the total number of lanes. One
lanes running at 12.288 Gbps is chosen since the minimum number of lanes is desired. This sets the JESD204B
mode (LMF) for the DAC as 124 mode.
NUMBER OF LANES
1
2
4
8
LINE RATE
12.288 Gbps
6.144 Gbps
3.072 Gbps
1.536 Gbps
POSSIBLE?
Yes
Yes
Yes
Yes
8.2.1.3 Application Performance Plots
Ref -18.7 dBm
-20
-30
1 RM *
CLRWR
-40
-50
-60
-70
-80
-90
-100
-110
Center 2.14 GHz
* Att 5 dB
* RBW 100 kHz
* VBW 1 MHz
* SWT 2 s
24 MHz/
A
NOR
3DB
Span 240 MHz
Ref -18.7 dBm
-20
-30
-40
-50
1 RM *
CLRWR -60
-70
-80
-90
-100
-110
* Att 5 dB
Center 2.14 GHz
Standard: E-UTRA/LTE Square
* RBW 100 kHz
* VBW 1 MHz
* SWT 2 s
24 MHz/
Tx Channels
Ch1 (Ref)
Ch2
Ch3
Ch4
-15.02 dBm
-14.70 dBm
-14.72 dBm
-15.33 dBm
Adjacent
Alternate
2nd Alt
3rd Alt
Total
-8.92 dBm
A
NOR
3DB
Lower
dB
-64.65
-65.52
-66.10
-66.40
Span 240 MHz
Upper
dB
-64.30
-65.43
-65.99
-66.32
Figure 82. Four Carrier 20MHz LTE Signal Spectrum
Figure 83. Four Carrier 20MHz LTE Signal ACPR
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