|
PCI4410A Datasheet, PDF (81/198 Pages) Texas Instruments – PC CARD AND OHCI CONTROLLER | |||
|
◁ |
4.30 General Status Register
The general status register provides the general device status information. The status of the serial EEPROM interface
is provided through this register. See Table 4â8 for a complete description of the register contents.
Bit
7
Name
Type
R
Default
0
Register:
Type:
Offset:
Default:
6
5
R
R
0
0
General status
Read/Clear, Read-only
85h (Function 0)
00h
4
3
General status
R
R
0
0
2
1
0
R
R/C
R
X
0
0
Table 4â8. General Status Register Description
BIT
SIGNAL TYPE
FUNCTION
7â3
RSVD
R Reserved. Bits 7â3 return 0s when read.
Serial EEPROM detect. Serial EEPROM is detected by sampling a logic high on SCL while PRST is low.
2
EEDETECT
R
When this bit is set, the serial ROM is detected. This status bit is encoded as:
0 = EEPROM is not detected (default).
1 = EEPROM is detected.
Serial EEPROM data error status. This bit indicates when a data error occurs on the serial EEPROM
1
DATAERR
R/C
interface. This bit may be set due to a missing acknowledge. This bit is cleared by a writeback of 1.
0 = No error is detected (default).
1 = Data error is detected.
Serial EEPROM busy status. This bit indicates the status of the PCI4410A serial EEPROM circuitry. This
0
EEBUSY
R
bit is set during the loading of the subsystem ID value.
0 = Serial EEPROM circuitry is not busy (default).
1 = Serial EEPROM circuitry is busy.
4.31 General Control Register
The general control register provides top-level PCI arbitration control. See Table 4â9 for a complete description of
the register contents.
Bit
7
6
5
4
3
2
1
0
Name
General control
Type
R
R
R
R
R/W
R
R/W
R/W
Default
0
0
0
0
0
0
0
0
Register:
Type:
Offset:
Default:
General control
Read-Only, Read/Write
86h
00h
Table 4â9. General Control Register Description
BIT
SIGNAL
TYPE
FUNCTION
7â4
RSVD
R Reserved. Bits 7â4 return 0s when read.
3 DISABLE_OHCI R/W When bit 3 is set, the open HCI 1394 controller function is completely nonaccessible and nonfunctional.
2
RSVD
R Reserved. Bit 2 returns 0 when read.
Controls top-level PCI arbitration.
00 = 1394 open HCI priority
1â0
ARB_CTRL
R/W
01 = CardBus priority
10 = Fair round robin
11 = Reserved (fair round robin)
4â19
|
▷ |