TMS320C6416TBGLZA8 Datasheet, PDF (80/148 Pages) Texas Instruments – FIXED-POINT DIGITAL SIGNAL PROCESSORS

TMS320C6414T, TMS320C6415T, TMS320C6416T
FIXEDĆPOINT DIGITAL SIGNAL PROCESSORS
SPRS226M − NOVEMBER 2003 − REVISED APRIL 2009
INPUT AND OUTPUT CLOCKS
timing requirements for CLKIN for -600 devices^{†‡§} (see Figure 16)
−600
NO.
PLL MODE x20 PLL MODE x12 PLL MODE x6
MIN MAX
MIN MAX
MIN MAX
1 tc(CLKIN) Cycle time, CLKIN
2 tw(CLKINH) Pulse duration, CLKIN high
3 tw(CLKINL) Pulse duration, CLKIN low
4 tt(CLKIN) Transition time, CLKIN
33.3
0.4C
0.4C
40
20 23.8 13.3 23.8
0.4C
0.4C
0.4C
0.4C
5
5
5
5 tJ(CLKIN) Period jitter, CLKIN
0.02C
0.02C
0.02C
† _{The reference points for the rise and fall transitions are measured at VIL MAX and VIH MIN.}
‡ _{For more details on the PLL multiplier factors (x6, x12, x20), see the Clock PLL section of this data sheet.}
§ _{C = CLKIN cycle time in ns. For example, when CLKIN frequency is 50 MHz, use C = 20 ns.}
x1 (BYPASS) UNIT
MIN MAX
0
10 ns
0.45C
ns
0.45C
ns
1 ns
0.02C ns
timing requirements for CLKIN for -720 devices^{†‡§} (see Figure 16)
−720
NO.
PLL MODE x20 PLL MODE x12 PLL MODE x6
MIN MAX
MIN MAX
MIN MAX
1 tc(CLKIN) Cycle time, CLKIN
2 tw(CLKINH) Pulse duration, CLKIN high
3 tw(CLKINL) Pulse duration, CLKIN low
4 tt(CLKIN) Transition time, CLKIN
27.7
0.4C
0.4C
40 16.6 23.8 13.3 23.8
0.4C
0.4C
0.4C
0.4C
5
5
5
5 tJ(CLKIN) Period jitter, CLKIN
0.02C
0.02C
0.02C
† _{The reference points for the rise and fall transitions are measured at VIL MAX and VIH MIN.}
‡ _{For more details on the PLL multiplier factors (x6, x12, x20), see the Clock PLL section of this data sheet.}
§ _{C = CLKIN cycle time in ns. For example, when CLKIN frequency is 50 MHz, use C = 20 ns.}
x1 (BYPASS) UNIT
MIN MAX
0
10 ns
0.45C
ns
0.45C
ns
1 ns
0.02C ns
80
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