TLC2933 Datasheet, PDF (8/21 Pages) Texas Instruments – HIGH-PERFORMANCE PHASE-LOCKED LOOP

TLC2933
HIGH-PERFORMANCE PHASE-LOCKED LOOP
SLAS136A – APRIL 1996 – REVISED JUNE 1997
operating characteristics over recommended operating free-air temperature range, V_DD = 5 V
(unless otherwise noted)
VCO section
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
fosc
ts(fosc)
tr
tf
α_(fosc)
Operating oscillation frequency
Time to stable oscillation (see Note 8)
Rise time, VCO OUT↑
Fall time, VCO OUT↓
Duty cycle at VCO OUT
Temperature coefficient of oscillation frequency
RBIAS = 2.4 kΩ,, VCO IN = 1/2 VDD
Measured from VCO INHIBIT↓
CL = 15 pF,
See Figure 3
CL = 15 pF,
See Figure 3
RBIAS = 2.4 kΩ, VCO IN = 1/2 VDD
RBIAS = 2.4 kΩ, VCO IN = 1/2 VDD,
TA = –20°C to 75°C
64
45%
80
2.1
1.5
50%
96
10
5
4
55%
MHz
µs
ns
ns
0.03
%/°C
kSVS(fosc)
Supply voltage coefficient of oscillation frequency
RBIAS = 2.4 kΩ, VCO IN = 2.5 V,
VDD = 4.75 V to 5.25 V
0.02
%/mV
Jitter absolute (see Note 9)
RBIAS = 2.4 kΩ
100
ps
NOTES: 8: The time period to stabilize the VCO oscillation frequency after the VCO INHIBIT terminal is changed to a low level.
9. Jitter performance is highly dependent on circuit layout and external device characteristics. The jitter specification was made with
a carefully designed printed circuit board (PCB) with no device socket.
PFD section
fmax
tPLZ
tPHZ
tPZL
tPZH
tr
tf
PARAMETER
Maximum operating frequency
Disable time, PFD INHIBIT↑ to PFD OUT Hi-Z
Disable time, PFD INHIBIT↑ to PFD OUT Hi-Z
Enable time, PFD INHIBIT↓ to PFD OUT low
Enable time, PFD INHIBIT↓ to PFD OUT high
Rise time, PFD OUT↑
Fall time, PFD OUT↓
TEST CONDITIONS
See Figures 4 and 5 and Table 3
CL = 15 pF, See Figure 4
MIN TYP MAX UNIT
50
MHz
20
40
ns
17
40
3.7
10
ns
3.4
10
1.7
5 ns
1.3
5 ns
8
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