TCA9535 Datasheet, PDF (8/32 Pages) Texas Instruments – LOW VOLTAGE 16-BIT I2C AND SMBus LOW-POWER I/O EXPANDER WITH INTERRUPT OUTPUT AND CONFIGURATION REGISTERS

TCA9535
SCPS201A – AUGUST 2009 – REVISED SEPTEMBER 2009........................................................................................................................................... www.ti.com
Device Address
Figure 4 shows the address byte of the TCA9535.
R/W
Slave Address
0 1 0 0 A2 A1 A0
Fixed Programmable
Figure 4. TCA9535 Address
Address Reference
INPUTS
A2
A1
A0
L
L
L
L
L
H
L
H
L
L
H
H
H
L
L
H
L
H
H
H
L
H
H
H
I²C BUS SLAVE ADDRESS
32 (decimal), 20 (hexadecimal)
33 (decimal), 21 (hexadecimal)
34 (decimal), 22 (hexadecimal)
35 (decimal), 23 (hexadecimal)
36 (decimal), 24 (hexadecimal)
37 (decimal), 25 (hexadecimal)
38 (decimal), 26 (hexadecimal)
39 (decimal), 27 (hexadecimal)
The last bit of the slave address defines the operation (read or write) to be performed. A high (1) selects a read
operation, while a low (0) selects a write operation.
Control Register and Command Byte
Following the successful acknowledgment of the address byte, the bus master sends a command byte that is
stored in the control register in the TCA9535. Three bits of this data byte state the operation (read or write) and
the internal register (Input, Output, Polarity Inversion, or Configuration) that will be affected. This register can be
written or read through the I²C bus. The command byte is sent only during a write transmission.
Once a command byte has been sent, the register that was addressed continues to be accessed by reads until a
new command byte has been sent.
0 0 0 0 0 B2 B1 B0
Figure 5. Control Register Bits
CONTROL REGISTER BITS
B2
B1
B0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
Control Register
COMMAND
BYTE (HEX)
0x00
0x01
0x02
0x03
0x04
0x05
0x06
REGISTER
Input Port 0
Input Port 1
Output Port 0
Output Port 1
Polarity Inversion Port 0
Polarity Inversion Port 1
Configuration Port 0
PROTOCOL
Read byte
Read byte
POWER-UP
DEFAULT
xxxx xxxx
xxxx xxxx
Re1a1d1/w1r1it1e1b1yte
Re1a1d1/w1r1it1e1b1yte
Re0a0d0/w0r0it0e0b0yte
Re0a0d0/w0r0it0e0b0yte
Re1a1d1/w1r1it1e1b1yte
8
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