TC25SPD Datasheet, PDF (8/19 Pages) Texas Instruments – 680 X 500 PIXEL CCD IMAGE SENSOR

TC253SPD
680ā×ā500 PIXEL CCD IMAGE SENSOR
SOCS062B – JANUARY 2001 – REVISED MAY 2002
advanced lateral overflow drain
The advanced lateral overflow drain structure is shared by two neighboring pixels in each line. Varying the dc
bias of the antiblooming drain can control the blooming protection level and trade it for well capacity. Applying
a pulse (approximately 10 V above the nominal level for a minimum of 1 µs) to the drain removes all charge from
the pixels. This feature permits a precise control of the integration time on a frame-by-frame basis. The
single-pulse clearing capability also reduces smear by eliminating accumulated charge in the pixels before the
start of the integration period (single-sided smear). The application of a negative 1-V pulse to the antiblooming
drain during the parallel transfer is recommended. This pulse prevents creation of undesirable artifacts caused
by the on-chip crosstalk between the image area gate clock lines and the antiblooming drain bias lines.
serial register and charge multiplier
The serial register is used to transport charge stored in the pixels of the memory to the output amplifier. However,
the TC253SPD device has a serial register with twice the standard length. The first half has a conventional
design that interfaces with the memory and the clearing drain as it would in any other CCD sensor (for example
the TC237 sensor). The second half, however, is unique and includes 400 charge multiplication stages with a
number of dummy pixels that are needed to transport charge between the active register blocks and the output
amplifier. Charge is multiplied as it progresses from stage to stage in the multiplier toward the charge detection
node. The charge multiplication level depends on the amplitude of multiplication pulses (approximately 11 V ~
17 V) applied to the multiplication gates. Due to the double length of the registers, the first line in the field or frame
scan does not contain valid data and must be discarded.
readout and video processing
The last element of the charge readout and detection chain is the charge detection node. Charge detection
nodes use standard floating diffusion (FD) concepts followed by dual-stage source followers as buffer
amplifiers. The reset gate is internally connected to SRG1. This connection results in a simultaneous FD reset
when the SRG1 gate is clocked high. To achieve the ultimate sensor performance, it is necessary to eliminate
the detection node kTC noise using CDS processing techniques. The IMPACTRONt devices can detect single
photons when cooling or when sufficiently short integration times are used.
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