SN74FB1653 Datasheet, PDF (8/12 Pages) Texas Instruments – 17-BIT LVTTL/BTL UNIVERSAL STORAGE TRANSCEIVER WITH BUFFERED CLOCK LINE

SN74FB1653
17ĆBIT LVTTL/BTL UNIVERSAL STORAGE TRANSCEIVER
WITH BUFFERED CLOCK LINE
SCBS702H − AUGUST 1997 − REVISED MARCH 2004
switching characteristics over recommended operating free-air temperature range,
V_CC(5 V) = 5 V ± 0.5 V and V_CC(3.3 V) = 3.3 V (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
MIN
fmax
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
tsk(p)†
AI
LEAB
CLKAB
2CLKAB
(no delay)
2CLKAB
(delay2)
2CLKAB
(delay3)
B
LEBA
CLKBA
2CLKAB
(delay1)
2CLKAB
(no delay)
OEB or OEB
OEA or OEA
OEA or OEA
Pulse skew, AI to B or B to AO
Pulse skew, 2CLKAB to 2CLK
90
1.8
B
2.9
2.7
B
3.5
2.3
B
2.9
2.3
2CLKAB
2.9
4.5
2CLKAB
4.5
9.3
2CLKAB
9.3
2
AO
2
1.8
AO
1.8
1.8
AO
1.8
5.7
2CLK
5.7
2
2CLK
2
2.6
B
2.6
1.4
AO
1.4
1.4
AO
1.4
tsk(p)
tsk(HL), tsk(LH)†
tsk(o)‡
tsk(o)‡
tt
Pulse skew, CLKAB to B or CLKBA to AO
Pulse skew, CLKAB to 2CLKAB
Output skew, AI to B or B to AO
Output skew, nondelayed mode for 2CLKAB, CLKAB to AO
Output skew, nondelayed mode for 2CLKAB, CLKAB to B and 2CLKAB
Output skew, nondelayed mode for 2CLKAB, CLKAB to B and 2CLKAB
Transition time, B outputs (1.3 V to 1.8 V)
0.5
Transition time, AO outputs (10% to 90%)
0.4
tPR
B-port input pulse rejection
1
† _{Skew values are applicable for through mode only, with single-output switching.}
‡ _{Skew values are applicable for CLK mode only, with all outputs simultaneously switching high-to-low or low-to-high.}
MAX
6.2
6.6
6.9
7.3
6.4
6.7
6
6.7
9.5
9.5
15.4
15.4
6.5
6.5
6.3
6.3
6.3
6.3
12.3
12.3
6.5
6.5
7
7
5.5
5.5
6.5
5.8
1.6
1.8
1.5
1.4
1
1
1
1.5
4.6
4.2
UNIT
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
8
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