SN74FB1653 Datasheet, PDF (4/12 Pages) Texas Instruments – 17-BIT LVTTL/BTL UNIVERSAL STORAGE TRANSCEIVER WITH BUFFERED CLOCK LINE

SN74FB1653
17ĆBIT LVTTL/BTL UNIVERSAL STORAGE TRANSCEIVER
WITH BUFFERED CLOCK LINE
SCBS702H − AUGUST 1997 − REVISED MARCH 2004
functional block diagram (continued)
45
2OEB
2OEB ⁴⁶
43
2CLKAB
2LEAB ⁴⁴
41
2LEBA
42
2CLKBA
39
2OEA
2OEA ⁴⁰
2SEL2 ⁶³
48
2SEL1
14
2CLK
Delay3
M
U
X
Delay2
M Delay1
U
X
2AI2 ¹⁷
16
2AO2
1D
C2
C1
1D
C2
C1
To Seven Other Channels
INPUTS
MUX-MODE DELAY
DELAY PATH†
2SEL1 2SEL2 2CLKAB TO 2CLKAB 2CLKAB TO 2CLK
L
L
No delay
No delay
L
H
No delay
Delay1
H
L
Delay2
Delay1
H
H
Delay3
Delay1
† _{Refer to delay1 through delay3 in the functional block diagram.}
4
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62
2CLKAB
60
2B2