CF45538NSRG4 Datasheet, PDF (8/19 Pages) Texas Instruments – TIRIS RF-Module IC for Automotive

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Function and Operation
As the normal frequency of the internal master clock is 17.1776 MHz, one clock count is equivalent to
130.133... kHz (17.1776 MHz divided by 132 = 130.133... kHz). Accordingly, a signal is identified as bit
data “1” with the resulting negative level output at the “RXDT–“ terminal when the signal frequency at the
“A3OP” terminal is 130.133... kHz or less, and it is identified as bit data “0” with the resulting positive level
output at the “RXDT–“ terminal when the signal frequency at the “A3OP” terminal is over 130.133... kHz.
An additional feature is included to maximize the stability of the above-mentioned FSK signal
demodulating system based on binary notation: the system incorporates a circuit which disables definition
of an “RXDT–“ signal unless more than four consecutive FS-keyed signal waves are identified within the
same frequency band during binary discrimination. This protects the once defined “RXDT–“ signal in the
bit data form from being affected by sporadic events. For instance, even when its discrimination result is
sporadically inverted due to some noise effects, it is not affected if only three or less consecutive FSkeyed
signal waves are identified at the “A3OP” terminal. (See the diagram below.)
Signal discriminated
at A3OP terminal
Internal frequency
discriminating signals
RXDT- terminal
output signals
DATA VALID
DATA VALID
Note: For the timing between “A3OP” and “RXDT–“ signals, refer to the section describing “Input-Output
Specifications”.
The signals demodulated through the above-mentioned process are sequentially output from the “RXDT–“
terminal in bit strings (“1” or “0”). To delimit these continuous bit strings, clock signals are output from the
“RXCK” terminal in synchronization with each bit data.
In normal operating conditions (when data communication can be properly performed between the
RI-RFM-006A and a TIRIS transponder), each bit data group sent from the remote transponder is
composed of sixteen consecutive signal waves belonging to the same frequency band (consisting of two
wave groups, 134.2-kHz high and 123.2-kHz low in terms of normal values). Therefore, clock signals at a
frequency resulting from a simple division of the “A3OP” terminal signal frequency by 16, are output from
the “RXCK” terminal. Then, each “RXCK” clock signal is controlled for output so that its first transition falls
after four consecutive “A3OP” signal waves from the “RXDT–“ signal change point. This enables an
external controller to obtain the relevant bit data without fail provided that each “RXDT–“ signal is fetched
well timed with the first transition of each “RXCK” signal. (See the diagram below.)
15 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3
A3OP terminal signal
RXDT- terminal output
RXCK terminal output
4 waves
One bit data group (16 waves)
DATA VALID
8 waves
4 waves
8
TIRIS RF-Module IC for Automotive
SCBU036 – December 1996
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