CD54HC4040 Datasheet, PDF(8/15 Page) Texas Instruments – High-Speed CMOS Logic 12-Stage Binary Counter

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CD54HC4040 Datasheet, PDF (8/15 Pages) Texas Instruments – High-Speed CMOS Logic 12-Stage Binary Counter

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CD54HC4040, CD74HC4040, CD54HCT4040, CD74HCT4040

Test Circuits and Waveforms (Continued)

trCL

CLOCK

INPUT

90%

10%

tH(H)

tfCL

50%

tH(L)

DATA

INPUT

tSU(H)

tSU(L)

OUTPUT

tREM

VCC

SET, RESET

OR PRESET

tTLH

90%

tPLH

50%

tTHL

90%

50%

10%

tPHL

50pF

VCC

GND

VCC

50%

GND

trCL

CLOCK

INPUT

2.7V

0.3V

tfCL

1.3V

tH(H)

tH(L)

DATA

INPUT

tSU(H)

1.3V

tSU(L)

OUTPUT

tREM

SET, RESET

OR PRESET

tTLH

90%

1.3V

tPLH

1.3V

tTHL

90%

1.3V

10%

tPHL

50pF

GND

FIGURE 5. HC SETUP TIMES, HOLD TIMES, REMOVAL TIME,

AND PROPAGATION DELAY TIMES FOR EDGE

TRIGGERED SEQUENTIAL LOGIC CIRCUITS

FIGURE 6. HCT SETUP TIMES, HOLD TIMES, REMOVAL TIME,

AND PROPAGATION DELAY TIMES FOR EDGE

TRIGGERED SEQUENTIAL LOGIC CIRCUITS

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